Patents by Inventor Hung-Wei Chen

Hung-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210017976
    Abstract: A micro pump is disclosed and includes a fluid-converging plate, a valve membrane, a fluid-outlet plate and a pump core module. The fluid-converging plate includes an inner recess, a protruding portion and a fluid-converging aperture. The protruding portion is disposed at a center of the inner recess. The valve membrane includes a valve aperture. The protruding portion of the fluid-converging plate abuts against the valve aperture. A fluid-converging chamber is formed between the valve membrane and the fluid-converging plate. The fluid-outlet plate in a ring shape includes a fluid-outlet channel. The valve aperture is in fluid communication with the fluid-outlet channel. When the fluid is inhaled into the pump core module, the fluid flows to the fluid-converging chamber through the fluid-converging aperture and then pushes out the valve membrane to flow into the fluid-outlet channel of the fluid-outlet plate through the valve aperture. Thereby the fluid transportation is achieved.
    Type: Application
    Filed: June 16, 2020
    Publication date: January 21, 2021
    Applicant: Microjet Technology Co., Ltd.
    Inventors: Hao-Jan Mou, Shih-Chang Chen, Jia-Yu Liao, Hung-Hsin Liao, Chung-Wei Kao, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee
  • Publication number: 20210013234
    Abstract: An electronic device is provided. The electronic device includes a substrate, a first gate circuit, a second gate circuit, a signal line, and a shielding layer. The substrate includes a display area and a peripheral area. The first gate circuit is disposed in the peripheral area. The second gate circuit is disposed in the peripheral area. The signal line is coupled between the first gate circuit and the second gate circuit. The signal line includes a specific line segment, and the specific line segment overlaps the display area. The shielding layer is disposed in the display area. The shielding layer overlaps the specific line segment.
    Type: Application
    Filed: June 22, 2020
    Publication date: January 14, 2021
    Inventors: Yu-Che CHANG, Li-Wei SUNG, Cheng-Tso CHEN, Hui-Min HUANG, Chia-Min YEH, Hung-Hsun CHEN
  • Publication number: 20210012110
    Abstract: An object detection apparatus includes a boundary box decision circuit and a processing circuit. The boundary box decision circuit receives lens configuration information of a lens, and refers to the lens configuration information to determine a bounding box distribution of bounding boxes that are assigned to different detection distances with respect to the lens for detection of a target object. The processing circuit receives a captured image that is derived from an output of an image capture device using the lens, and performs object detection upon the captured image according to the bounding box distribution of the bounding boxes.
    Type: Application
    Filed: February 12, 2020
    Publication date: January 14, 2021
    Inventors: Chih-Wei Chen, Pei-Kuei Tsung, Shao-Yi Wang, Hung-Jen Chen, Kuan-Yu Chen, Cheng-Lung Jen
  • Publication number: 20200411439
    Abstract: A semiconductor device includes a first chip package, a heat dissipation structure and an adapter. The first chip package includes a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die has an active surface and a back surface opposite to the active surface. The heat dissipation structure is connected to the chip package. The adapter is disposed over the first chip package and electrically connected to the semiconductor die.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yuan Teng, Hung-Yi Kuo, Hao-Yi Tsai, Tin-Hao Kuo, Yu-Chia Lai, Shih-Wei Chen
  • Patent number: 10879130
    Abstract: Semiconductor device structures are provided. The semiconductor device structure includes first semiconductor wires over a semiconductor substrate. The first semiconductor wires are vertically spaced apart from each other. The semiconductor device structure also includes a gate stack surrounding first portions of the first semiconductor wires, and a spacer element surrounding second portions of the first semiconductor wires. The first portions have a first width and the second portions have a second width. In addition, the semiconductor device structure includes a second semiconductor wire between the second portions. The second semiconductor wire has a third width, and the third width is substantially equal to the second width and greater than the first width.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Hung-Li Chiang, I-Sheng Chen, Tzu-Chiang Chen, Tung-Ying Lee, Szu-Wei Huang, Huan-Sheng Wei
  • Patent number: 10879051
    Abstract: A plasma processing apparatus is provided. The apparatus includes a lower sheltering module. The apparatus further includes an upper sheltering module arranged adjacent to the lower sheltering module. The apparatus includes an upper plate and an upper PEZ ring positioned around the upper plate. The apparatus also includes a shadowing unit that includes a number of engaging parts in the form of arcs detachably positioned on the upper PEZ ring. In addition, the apparatus includes a plasma generation module for generating plasma in the peripheral region of the lower sheltering module and the upper sheltering module.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsing Wu, Hung-Jui Chang, Chih-Ching Cheng, Yi-Wei Chiu, Kun-Cheng Chen
  • Patent number: 10859630
    Abstract: A circuit test method for a test device to test a device under test is provided. The circuit test method includes the steps of applying zero volts to a plurality of power pins of the device under test; applying a test voltage to a first signal pin among a plurality of signal pins of the device under test; and measuring a current on a second signal pin among the plurality of signal pins of the device under test and determining whether there is a leakage current in the device under test.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: December 8, 2020
    Assignee: SILICON MOTION, INC.
    Inventors: Hung-Sen Kuo, Te-Wei Chen, Hung-Sheng Chang, Ming-Wan Kuan
  • Patent number: 10841390
    Abstract: A system and method for synchronizing publication and subscription of message queues are provided. The method includes: providing a message broker cluster including a plurality of message brokers each having a buffer queue and a data queue; as any one of the message brokers requests a synchronization requirement, selecting, by an orchestration server, one of the message brokers in the message broker cluster to perform data synchronization; setting a data read-lock to the data queue of the selected message broker sequentially to write data contents in the buffer queues of all of the plurality of message brokers into the data queue of the selected message broker; and copying the complete data contents in the data queue of the selected message broker to the data queues of the other message brokers, allowing the data contents in the data queues of each of the message brokers to be consistent.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: November 17, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lun Chen, Hung-Wei Lin, Li-Ting Huang
  • Patent number: 10826449
    Abstract: Disclosed is a high accurate measurement circuit, and the feature is using bias switching circuit for compensating front end offset, and the back end offset of amplifier is also cancelled. In the real measurement environment, offset exists in the amplifier of the measurement circuit has, and non-ideal effects also exist in the interface between measurement terminal and the measurement circuit, such as leakage current of chip package pins or mismatch of the circuit. The above non-ideal effects belong to front end offset and cannot be compensated by the prior arts. The disclosed structure uses the bias switch circuit and uses different switching method in the two measurement timings. By subtracting the measurement results for the two measurement timings, the front end offset is compensated, and the back end offset of the amplifier is also cancelled.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: November 3, 2020
    Assignee: HYCON TECHNOLOGY CORP.
    Inventors: Po-Yin Chao, Hung-Wei Chen, Shui-Chu Lee
  • Publication number: 20200342801
    Abstract: The present invention discloses a driving method for a source driver, for driving a source line of a display panel. The driving method includes the steps of: driving the source line with a first voltage or a second voltage smaller than the first voltage in a first driving cycle; driving the source line with the first voltage in a second driving cycle next to the first driving cycle when the source line is driven with the first voltage in the first driving cycle; and driving the source line with an overdrive voltage in the second driving cycle when the source line is driven with the second voltage in the first driving cycle. The first voltage is a normal high voltage of the display panel, and the overdrive voltage is greater than the normal high voltage.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 29, 2020
    Inventors: Yen-Tao Liao, Hung-Hsiang Chen, Jen-Ta Yang, Yi-Wei Lin, Huang-Chin Tang
  • Publication number: 20200335400
    Abstract: In a method, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers are etched at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a first source/drain space in which the second semiconductor layers are exposed. A dielectric layer is formed at the first source/drain space, thereby covering the exposed second semiconductor layers. The dielectric layer and part of the second semiconductor layers are etched, thereby forming a second source/drain space. A source/drain epitaxial layer is formed in the second source/drain space. At least one of the second semiconductor layers is in contact with the source/drain epitaxial layer, and at least one of the second semiconductor layers is separated from the source/drain epitaxial layer.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 22, 2020
    Inventors: Hung-Li CHIANG, Chao-Ching CHENG, Chih-Liang CHEN, Tzu-Chiang CHEN, Ta-Pen GUO, Yu-Lin YANG, I-Sheng CHEN, Szu-Wei HUANG
  • Patent number: 10806044
    Abstract: A board structure for a cable passing therethrough includes a board body and a grommet. The board body includes a board hole and a first inner protrusion portion. A minimum diameter of the board hole is a diameter located corresponding to the first inner protrusion portion of the board hole. The grommet is made of an elastic material and disposed in the board hole. The grommet includes a grommet hole and an outer annular wall. The outer annular wall is connected to the first inner protrusion portion. The grommet hole is for the cable passing therethrough and coaxially disposed with the board hole. A diameter of the grommet hole is smaller than the minimum diameter of the board hole.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: October 13, 2020
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Hung-Wei Lee, Tung-Yi Chen, Cheng-Wei Yeh
  • Publication number: 20200322710
    Abstract: A headphone assembly, including: a switching element for controlling a switch of at least one functional element in a headphone; a pressure sensor accommodated in a groove of a speaker board; and an ear pad covering the groove, when the ear pad is pressed, a trigger element may be moved to press against the pressure sensor, when detecting that pressure applied by the trigger element reaches a predetermined range, the pressure sensor switches on the switching element, otherwise, the pressure sensor switches off the switching element.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 8, 2020
    Inventors: Thomas Pieter J. PEETERS, Hung-Fen CHEN, Hung-Wei LEE, Chia-Hsin HUNG
  • Publication number: 20200315050
    Abstract: A board structure for a cable passing therethrough includes a board body and a grommet. The board body includes a board hole and a first inner protrusion portion. A minimum diameter of the board hole is a diameter located corresponding to the first inner protrusion portion of the board hole. The grommet is made of an elastic material and disposed in the board hole. The grommet includes a grommet hole and an outer annular wall. The outer annular wall is connected to the first inner protrusion portion. The grommet hole is for the cable passing therethrough and coaxially disposed with the board hole. A diameter of the grommet hole is smaller than the minimum diameter of the board hole.
    Type: Application
    Filed: December 10, 2019
    Publication date: October 1, 2020
    Inventors: Hung-Wei LEE, Tung-Yi CHEN, Cheng-Wei YEH
  • Publication number: 20200300897
    Abstract: Disclosed is a sensor with compensation circuit for compensating offset by use of a switching circuit. The sensor has two operation modes for generating two output voltages, respectively. Offset is compensated by adding the two output voltages, and magnitude of the offset is calculated by subtracting the two output voltages. A noise threshold is set for checking if the circuit is affected by interference. When the circuit is affected by interference, the adding result of the two output voltages will be larger than the noise threshold, the output data will be hold and not updated, then a reminding signal will be issued to show that the circuit is affected by interference, and the output data flickers on a display unit when the adding result of the two output voltages is larger than the noise threshold for showing the circuit is affected by interference.
    Type: Application
    Filed: March 19, 2019
    Publication date: September 24, 2020
    Inventors: Po-Yin CHAO, Hung-Wei CHEN, Shui-Chu LEE
  • Patent number: 10784252
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 22, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Li-Fan Chen, Chih-Hsuan Lin, Yu-Kai Wang, Hung-Wei Chen, Ching-Wen Wang, Ting-You Lin, Chun-Chih Chen
  • Publication number: 20200295243
    Abstract: A method of packaging a semiconductor illumination module is provided. The method includes the following steps. In a step (a), a substrate is provided. The substrate is selected from one of a flexible printed circuit board, a metal core circuit board, a printed circuit board or a ceramic printed circuit board. The substrate includes a solder mask layer with an opening, and the opening has a width R. In a step (b), a light-emitting element is installed in the opening. In a step (c), an encapsulant injection device is used to inject a packaging encapsulant into the opening. In a step (d), a sealed lens structure is formed to cover the light-emitting element, wherein the sealed lens structure has a height h.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 17, 2020
    Inventors: Hung-Wei Kuo, Ya-Chin Tu, Chung-Yuan Chen
  • Patent number: 10770014
    Abstract: A display device includes a display panel having a display region and a peripheral region. The display panel includes a substrate and a scan driving circuit. The scan driving circuit disposed on the substrate includes a plurality of scan driving blocks and a plurality of first conductive lines. The first conductive lines are respectively coupled to and disposed between adjacent scan driving blocks. The scan driving blocks are disposed corresponding to the peripheral region, and the first conductive lines are disposed corresponding to the display region and the peripheral region.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: September 8, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Chia-Min Yeh, Hung-Hsun Chen, Hui-Min Huang, Cheng-Tso Chen, Li-Wei Sung
  • Patent number: 10761359
    Abstract: A touch display device including a first substrate, a second substrate, a display medium, and a pixel array structure is provided. The pixel array structure includes a scan line, a data line, an active device, pixel electrodes, a signal electrode layer and a signal transmission layer. The scan line intersects the data line. The active device is connected to the scan line and the data line. The pixel electrodes are arranged in an array. The signal electrode layer includes signal electrodes. The signal transmission layer includes a signal line disposed between two adjacent columns of the pixel electrodes and electrically connected to one of the signal electrodes. The data line includes at least a portion located outside of the signal line.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: September 1, 2020
    Assignee: Innolux Corporation
    Inventors: Hung-Kun Chen, Hsieh-Li Chou, Li-Wei Sung, Tung-Kai Liu, Chia-Hao Tsai, Chih-Hao Chang, Bo-Feng Chen, Yu-Chien Kao
  • Patent number: 10725267
    Abstract: A four-piece optical lens for capturing image and a four-piece optical module for capturing image are provided. In order from an object side to an image side, the optical lens along the optical axis includes a first lens with refractive power; a second lens with refractive power; a third lens with refractive power; and a fourth lens with positive refractive power; and at least one of the image-side surface and object-side surface of each of the four lens elements are aspheric. The optical lens can increase aperture value and improve the imagining quality for use in compact cameras.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: July 28, 2020
    Assignee: ABILITY OPTO-ELECTRONICS TECHNOLOGY CO. LTD.
    Inventors: Po-Jui Liao, Hung-Wen Lee, Ying Jung Chen, Bo Guang Jhang, Kuo-Yu Liao, Yao Wei Liu, Yeong-Ming Chang