Patents by Inventor Hung-Yi Lin

Hung-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250133322
    Abstract: The present disclosure provides a wearable component. The wearable component includes a first carrier and a first electronic component at least partially embedded within the first carrier. The first carrier and the first electronic component define a space configured for audio transmission. An ear tip and a method of manufacturing a wearable component are also provided.
    Type: Application
    Filed: December 30, 2024
    Publication date: April 24, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Yi WU, Hung Yi LIN, Jenchun CHEN
  • Patent number: 12229630
    Abstract: A reading method and a reading device for a two-dimensional code. The method includes: capturing a two-dimensional code image through an image capturing device; detecting an outer frame and a position mark of a two-dimensional code in a skewed state in the two-dimensional code image; restoring the two-dimensional code in the skewed state to a default state; and performing a default operation according to the two-dimensional code in the default state.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: February 18, 2025
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Chin-Hao Yeh, Chin-Wen Lin, Hung-Yi Lin
  • Publication number: 20250043136
    Abstract: A novel rheology modifier which comprises a quaternary ammonium containing polyamide for use in aqueous paint, and that can provide excellent pigment suspension and rheological properties to the aqueous based coating without being affected by pH fluctuation.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 6, 2025
    Applicant: ELEMENTIS SPECIALTIES, INC.
    Inventors: Chun-Hung Yen, Wei-Jen Huang, Ming-Jhe Li, Yu-Lun Hung, Hou-Jen Yen, Yu-Yen Lu, Yu-Zhe Su, Hung-Yi Lin
  • Patent number: 12218075
    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: February 4, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hsu-Chiang Shih, Hung-Yi Lin, Chien-Mei Huang
  • Patent number: 12185047
    Abstract: The present disclosure provides a wearable component. The wearable component includes a first carrier and a first electronic component at least partially embedded within the first carrier. The first carrier and the first electronic component define a space configured for audio transmission. An ear tip and a method of manufacturing a wearable component are also provided.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: December 31, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Yi Wu, Hung Yi Lin, Jenchun Chen
  • Publication number: 20240371711
    Abstract: A package structure is provided. The package structure includes an amplifier and a filter structure. The amplifier has an active surface. The filter structure is disposed over the amplifier, and communicates with the amplifier through a first signal path substantially vertical to the active surface of the amplifier.
    Type: Application
    Filed: May 5, 2023
    Publication date: November 7, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Ting CHEN, Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20240373752
    Abstract: A semiconductor substrate and a package structure including the same are provided. The semiconductor substrate includes a first surface and a second surface. The first surface includes a filtering region. The second surface is opposite to the first surface and includes an amplifying region.
    Type: Application
    Filed: May 5, 2023
    Publication date: November 7, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Ting CHEN, Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20240345337
    Abstract: An optical device is provided. The optical device includes a first photonic component and a second photonic component. The first photonic component is configured to communicate with the second photonic component through a first optical path or an electrical path depending on a distance between the first photonic component and the second photonic component.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 17, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tai-Hsiang LIU, Hung-Yi LIN, Wen Chieh YANG
  • Patent number: 12105892
    Abstract: An electronic device includes: at least one connection interface, to receive an external signal. A first signal switching multiplexer is connected to the connection interface. A laptop system is connected to the first signal switching multiplexer, to operate in a laptop mode. A drawing board system is connected to the first signal switching multiplexer, to operate in a drawing board mode and an independent screen mode. A switching switch generates a switching signal and transmits it to the first signal switching multiplexer, the laptop system, and the drawing board system, to select the laptop mode, the drawing board mode, or the independent screen mode.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: October 1, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yi-Lun Lai, Cheng-Hui Wu, Huan-Hsun Huang, Hung-Yi Lin, Yi-Ou Wang
  • Publication number: 20240304555
    Abstract: A package structure and a method for manufacturing the package structure are provided. The package structure includes an interposer, a first electronic component over the interposer, and a second electronic component over the interposer. The interposer includes a first interconnector and a second interconnector. The first electronic component and the second electronic component are disposed at a first horizontal level and electrically connected to each other through the first interconnector. The second interconnector is electrically connected to a third electronic component disposed at a second horizontal level different from the first horizontal level.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20240304584
    Abstract: A package structure is provided. The package structure includes a semiconductor substrate. The semiconductor substrate includes a lower portion and an upper portion. The upper portion of the semiconductor substrate defines a high speed signal transmission region. The high speed signal transmission region includes a first region configured to communicate with a first electronic component and a second region configured to communicate with an external device.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hai-Ming CHEN, Hung-Yi LIN, Cheng-Yuan KUNG
  • Patent number: 12051658
    Abstract: A semiconductor package structure includes a redistribution structure and an impedance matching device. The redistribution structure includes a first surface, a second surface opposite to the first surface and a circuitless region extending from the first surface to the second surface. The impedance matching device is disposed on the redistribution structure and includes at least one impedance matching circuit aligned with the circuitless region.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: July 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin
  • Publication number: 20240220049
    Abstract: A seamless touchpad device includes at least two adjacent touchpad units, a first touchpad unit and a second touchpad unit. The first touchpad unit includes a plurality of first horizontal signal lines, a plurality of first vertical signal lines and a first control unit connected thereto. The second touchpad unit includes second horizontal signal lines, second vertical signal lines and a second control unit connected, and the second control unit is electrically connected to the first control unit. Each first horizontal signal line is correspondingly connected to one of the second horizontal signal lines, and part of the first vertical signal lines close to the second touchpad unit among the first vertical signal lines is individually connected to part of the second vertical signal lines close to the first touchpad unit among the second vertical signal lines, so as to form an overlapping scanning area.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 4, 2024
    Inventors: Chin-Wen LIN, Hung-Yi LIN, Wei-Ting WONG, Ching-Fu HSU
  • Publication number: 20240215151
    Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Chien-Mei HUANG, I-Ting LIN, Sheng-Wen YANG
  • Patent number: 11935841
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Meng-Wei Hsieh, Yu-Pin Tsai
  • Publication number: 20240070416
    Abstract: A reading method and a reading device for a two-dimensional code. The method includes: capturing a two-dimensional code image through an image capturing device; detecting an outer frame and a position mark of a two-dimensional code in a skewed state in the two-dimensional code image; restoring the two-dimensional code in the skewed state to a default state; and performing a default operation according to the two-dimensional code in the default state.
    Type: Application
    Filed: November 15, 2022
    Publication date: February 29, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chin-Hao Yeh, Chin-Wen Lin, Hung-Yi Lin
  • Publication number: 20230420395
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Cheng LIN, Hung-Yi LIN, Cheng-Yuan KUNG, Hsu-Chiang SHIH, Cheng-Yu HO
  • Publication number: 20230403078
    Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Yu LIN, Cheng-Yuan KUNG, Hung-Yi LIN
  • Publication number: 20230400648
    Abstract: The present disclosure provides an electronic package. The electronic package includes a photonic component including a first input/output (I/O) port and a second I/O port both at a side of the photonic component. The electronic package also includes a connector disposed adjacent to the side of the photonic component and configured to guide a first light carrying medium to be optically coupled with at least one of the first I/O port and second I/O port of the photonic component.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Han-Chee YEN, Min-Yao CHENG, Hung-Yi LIN
  • Patent number: 11824029
    Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: November 21, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Han Chen, Hung-Yi Lin