Patents by Inventor Hung Yi

Hung Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12038599
    Abstract: A package includes silicon waveguides on a first side of an oxide layer; photonic devices on the first side of the oxide layer, wherein the photonic devices are coupled to the silicon waveguides; redistribution structures over the first side of the oxide layer, wherein the redistribution structures are electrically connected to the photonic devices; a hybrid interconnect structure on a second side of the oxide layer, wherein the hybrid interconnect structure includes a stack of silicon nitride waveguides that are separated by dielectric layers; and through vias extending through the hybrid interconnect structure and the oxide layer, wherein the through vias make physical and electrical connection to the redistribution structures.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Kuo-Chiang Ting, Jiun Yi Wu, Hung-Yi Kuo, Shang-Yun Hou
  • Patent number: 12040283
    Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Cheng-Chieh Hsieh, Hsiu-Jen Lin, Hui-Jung Tsai, Hung-Yi Kuo, Hao-Yi Tsai, Ming-Hung Tseng, Yen-Liang Lin, Chun-Ti Lu, Chung-Ming Weng
  • Publication number: 20240228705
    Abstract: A resin composition is provided, which includes diamine, a BMI resin, and a modified polyphenylene ether resin having a following structural formula: wherein R represents a chemical group of a bisphenol compound located between two hydroxyphenyl functional groups thereof, and n is an integer ranging from 3 to 25.
    Type: Application
    Filed: February 17, 2023
    Publication date: July 11, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu
  • Publication number: 20240228755
    Abstract: A resin composition includes SBS resin, BMI resin, a crosslinking agent, and a modified polyphenylene ether resin has a following general formula: wherein R represents a chemical group of a bisphenol compound located between two hydroxyphenyl functional groups thereof, and n is an integer ranging from 3 to 25.
    Type: Application
    Filed: February 23, 2023
    Publication date: July 11, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu
  • Publication number: 20240228767
    Abstract: A resin composition includes an epoxy resin, a benzoxazine resin, a BMI resin, and a modified polyphenylene ether resin has a structure represented by the following formula: wherein R represents a chemical group of a bisphenol compound located between two hydroxyphenyl functional groups, and n is an integer ranging from 3 to 25.
    Type: Application
    Filed: February 17, 2023
    Publication date: July 11, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu
  • Publication number: 20240228779
    Abstract: A resin composition includes CE resin, BMI resin, and a modified polyphenylene ether resin has a following general formula: wherein R represents a chemical group of a bisphenol compound located between two hydroxyphenyl functional groups thereof, and n is an integer ranging from 3 to 25.
    Type: Application
    Filed: February 17, 2023
    Publication date: July 11, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu
  • Publication number: 20240220049
    Abstract: A seamless touchpad device includes at least two adjacent touchpad units, a first touchpad unit and a second touchpad unit. The first touchpad unit includes a plurality of first horizontal signal lines, a plurality of first vertical signal lines and a first control unit connected thereto. The second touchpad unit includes second horizontal signal lines, second vertical signal lines and a second control unit connected, and the second control unit is electrically connected to the first control unit. Each first horizontal signal line is correspondingly connected to one of the second horizontal signal lines, and part of the first vertical signal lines close to the second touchpad unit among the first vertical signal lines is individually connected to part of the second vertical signal lines close to the first touchpad unit among the second vertical signal lines, so as to form an overlapping scanning area.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 4, 2024
    Inventors: Chin-Wen LIN, Hung-Yi LIN, Wei-Ting WONG, Ching-Fu HSU
  • Publication number: 20240215151
    Abstract: The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a first redistribution structure and a first encapsulant. The first encapsulant supports the first redistribution structure and is configured to function as a first reinforcement to provide a second redistribution structure. The redistribution structure has a plurality of conductive layers disposed over the first redistribution structure.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsu-Chiang SHIH, Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Chien-Mei HUANG, I-Ting LIN, Sheng-Wen YANG
  • Publication number: 20240210636
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Application
    Filed: March 5, 2024
    Publication date: June 27, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240213129
    Abstract: An interposer device comprises two bump regions, a channel region, a plurality of signal lines and a plurality of ground lines. The two bump regions are respectively coupled to two semiconductor devices. The channel region is connected between the two bump regions. The plurality of signal lines are embedded in the two bump regions and the channel region, and electrically connected to the two semiconductor devices for transmitting circuit signals. The plurality of ground lines are embedded in the two bump regions and the channel region for shielding the plurality of signal lines. In each bump region, each signal line comprises a trunk portion, a turning portion, and a signal turning point connected between the trunk portion and the turning portion. The trunk portion extends parallel to a first direction, and the turning portion extends parallel to a second direction.
    Type: Application
    Filed: March 21, 2023
    Publication date: June 27, 2024
    Inventors: Hao-Yu TUNG, Sheng-Fan YANG, Hung-Yi CHANG, Yi-Tzeng LIN, Wei-Chiao WANG, Wei-Hsun LIAO
  • Patent number: 12017817
    Abstract: A carrier tray and a carrier tray assembly using the same are described. The carrier tray includes a carrying portion, a surrounding wall and at least one recessed structure. The carrying portion has a top surface and a bottom surface opposite to the top surface. The surrounding wall is disposed around the carrying portion. The recessed structure is recessed into the carrying portion. The recessed structure has an opening and a recessed space, and the recessed space is communicated with the outside through the opening. There is a first distance defined by the recessed space along a first direction, and there is a second distance defined by the opening along the first direction. The first distance is greater than the second distance.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: June 25, 2024
    Assignees: Radiant(Guangzhou) Opto-Electronics Co., Ltd, Radiant Opto-Electronics Corporation
    Inventors: Hung-Yi Hsu, Hung-Lin Chou, Chao-Hsu Chen, Pei-Ling Kao, Chih-Ming Chan
  • Patent number: 12014979
    Abstract: In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: June 18, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo Lung Pan, Shu-Rong Chun, Teng-Yuan Lo, Hung-Yi Kuo, Chih-Horng Chang, Tin-Hao Kuo, Hao-Yi Tsai
  • Publication number: 20240192456
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Application
    Filed: February 26, 2024
    Publication date: June 13, 2024
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240195615
    Abstract: A distributed key generation system and a key generation method are provided. The distributed key generation system includes a plurality of electronic devices and a server device. Each electronic device sends a data fragment. The server device synthesizes the key according to the data fragments. In this way, the key is not generated in advance, which can reduce the risk of key leakage.
    Type: Application
    Filed: March 30, 2023
    Publication date: June 13, 2024
    Applicant: Block Chain Security Corp.
    Inventors: Chin-Po Huang, Chi-Wei Feng, Hung-Yi Liu
  • Patent number: 12002867
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a layer of dielectric material over the gate structure, a source/drain (S/D) contact layer formed through and adjacent to the gate structure, and a trench conductor layer over and in contact with the S/D contact layer. The S/D contact layer can include a layer of platinum-group metallic material and a silicide layer formed between the substrate and the layer of platinum-group metallic material. A top width of a top portion of the layer of platinum-group metallic material can be greater than or substantially equal to a bottom width of a bottom portion of the layer of platinum-group metallic material.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hung Chu, Shuen-Shin Liang, Hsu-Kai Chang, Tzu Pei Chen, Kan-Ju Lin, Chien Chang, Hung-Yi Huang, Sung-Li Wang
  • Patent number: 12002799
    Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Hung-Yi Kuo, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Yuan Yu, Ming Hung Tseng
  • Publication number: 20240179855
    Abstract: A portable controller with replaceable module includes: a main body having a touchable display screen; a control system installed in the main body; a power supply system installed in the main body and connected to the control system to detect and adjust the power supply; a functional module, detachably connected to the main body to provide data, wherein, the control system is used to display data on the touchable display screen relative to the function module and to control the function module through the touchable display screen. Therefore, the portable controller with replaceable module could be applied to different functional modules to achieve wide area use purpose.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventor: HUNG-YI CHANG
  • Publication number: 20240178102
    Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 30, 2024
    Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
  • Publication number: 20240174779
    Abstract: A resin composition is provided. The resin composition includes a resin mixture, a flame retardant, a spherical silica and a siloxane coupling agent. The resin mixture includes a first resin polymerized by a monomer mixture including styrene, divinylbenzene and ethylene, a second resin including a polyphenylene ether resin modified by bismaleimide, and a SBS resin. The resin composition of the present disclosure can have a high glass transition temperature, a low dielectric constant and a low dissipation factor.
    Type: Application
    Filed: January 3, 2023
    Publication date: May 30, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu, HungFan Lee
  • Publication number: 20240174849
    Abstract: A resin composition is provided, which includes a novel low-dielectric resin, a cross-linking agent, a polyphenylene ether resin, a halogen-free flame retardant, a spherical silica, and a siloxane coupling agent. The novel low-dielectric resin has a styrene proportion of 10% to 40%, a divinylbenzene proportion of 10% to 40%, and an ethylene proportion of 10% to 20%, which may effectively reduce the dissipation factor of the resin composition, and achieve the electrical specification of low dielectric.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Applicant: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Ru Huang, Hung-Yi Chang, Chia-Lin Liu