Abstract: Disclosed herein is a light emitting diode (LED) package. The present invention is directed to a light emitting diode (LED) package capable of efficiently dissipating heat generated from LEDs. The present invention is also directed to a LED package in which a plurality of LEDs are disposed and heat generated from the plurality of LEDs is efficiently dissipated.

Abstract: Disclosed herein is a light emitting diode (LED) package. The present invention is directed to a light emitting diode (LED) package capable of efficiently dissipating heat generated from LEDs. The present invention is also directed to a LED package in which a plurality of LEDs are disposed and heat generated from the plurality of LEDs is efficiently dissipated.

Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.

Abstract: A substrate for a light emitting diode (LED) and a method of manufacturing the substrate for the LED are provided. The substrate for the LED includes a conductive substrate which includes an upper surface including a first flat surface and a second flat surface stepped from the first flat surface, an insulating layer formed on the second flat surface, and an electrode layer spaced apart from the first flat surface and disposed on the insulating layer.

Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.

Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.

Abstract: A method of processing a cavity of a core substrate is disclosed. The method of processing a cavity of a core substrate in accordance with an embodiment of the present invention can include: forming a first processing area on one surface of a core substrate, the first processing area being demarcated by a circuit pattern; forming a second processing area on the other surface of the core substrate, the second processing area being demarcated by a circuit pattern; and processing a cavity by removing the entire first processing area from the one surface of the core substrate.

Abstract: A method of processing a cavity of a core substrate is disclosed. The method of processing a cavity of a core substrate in accordance with an embodiment of the present invention can include: forming a first processing area on one surface of a core substrate, the first processing area being demarcated by a circuit pattern; forming a second processing area on the other surface of the core substrate, the second processing area being demarcated by a circuit pattern; and processing a cavity by removing the entire first processing area from the one surface of the core substrate.

Abstract: An electronic component embedded printed circuit board is disclosed. In accordance with an embodiment of the present invention, the electronic component embedded printed circuit board is a printed circuit board in which an electronic component is embedded in a core board, and the electronic component includes a silicon layer and a passivation layer, which is formed on one surface of the silicon layer. Here, a center line of the silicon layer and a center line of the core board are placed on a same line.

Abstract: A PCB strip and a method of manufacturing an electronic component embedded printed circuit board are disclosed. The PCB strip in accordance with an embodiment of the present invention includes a unit area, which has a plurality of substrate units provided therein, and a dummy area, which is provided on an outer side of the unit area. Here, an electronic component can be embedded in the substrate unit, and an electrostatic discharge preventing component for protecting the electronic component from an electrostatic discharge can be embedded in the dummy area.

Abstract: A substrate for a semiconductor device is provided. The substrate includes a first metal line, a second metal line, a metal support part, a first insulating part, and a second insulating part. The first metal line is electrically connected to a first electrode of the semiconductor device. The second metal line is electrically connected to a second electrode of the semiconductor device and spaced apart from the first metal line. The metal support part is disposed between the first metal line and the second metal line. The first insulating part is disposed between the first metal line and the metal support part and configured to electrically insulate the first metal line from the metal support part. The second insulating part is disposed between the second metal line and the metal support part and configured to electrically insulate the second metal line from the metal support part.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board that includes fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board, the method including providing a substrate on which a first metal layer, a dielectric layer and an adhesive resin layer are stacked on the order thereof; etching a part of the first metal layer to form a first electrode and a first circuit pattern; compressing a surface of the substrate, on which the first electrode is formed, onto a core board by interposing an insulation resin layer; forming a second electrode and a second circuit pattern on the adhesive resin layer; stacking an insulation board on the substrate such that the second electrode and the second circuit pattern are covered; and forming a third circuit pattern on the insulation board.

Abstract: A method of manufacturing a printed circuit board (PCB) having embedded resistors, including providing a PCB on which internal layer circuit patterns, including electrode pads, are formed; layering insulating layers on the PCB; forming first via holes on the electrode pads and simultaneously forming second via holes at predetermined locations on the internal layer circuit patterns; forming contact pads for connecting the electrode pads with resistors by filling the first via holes with oxidation-resistant conductive material and flattening the oxidation-resistant conductive material; forming the resistors so that ends of each resistor are connected to two respective contact pads, which are spaced apart from each other; forming circuit patterns on the PCB, in which the second via holes are formed; and layering insulting layers on the PCB having the formed circuit patterns, and forming external layer circuit patterns.

Abstract: A PCB strip and a method of manufacturing an electronic component embedded printed circuit board are disclosed. The PCB strip in accordance with an embodiment of the present invention includes a unit area, which has a plurality of substrate units provided therein, and a dummy area, which is provided on an outer side of the unit area. Here, an electronic component can be embedded in the substrate unit, and an electrostatic discharge preventing component for protecting the electronic component from an electrostatic discharge can be embedded in the dummy area.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board that includes fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

Abstract: An electronic component embedded printed circuit board is disclosed. In accordance with an embodiment of the present invention, the electronic component embedded printed circuit board is a printed circuit board in which an electronic component is embedded in a core board, and the electronic component includes a silicon layer and a passivation layer, which is formed on one surface of the silicon layer. Here, a center line of the silicon layer and a center line of the core board are placed on a same line.

Abstract: A method of processing a cavity of a core substrate is disclosed. The method of processing a cavity of a core substrate in accordance with an embodiment of the present invention can include: forming a first processing area on one surface of a core substrate, the first processing area being demarcated by a circuit pattern; forming a second processing area on the other surface of the core substrate, the second processing area being demarcated by a circuit pattern; and processing a cavity by removing the entire first processing area from the one surface of the core substrate.

Abstract: A method of manufacturing a capacitor-embedded PCB is disclosed. The method may include fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

Abstract: A method of manufacturing a printed circuit board (PCB) having embedded resistors, including providing a PCB on which internal layer circuit patterns, including electrode pads, are formed; layering insulating layers on the PCB; forming first via holes on the electrode pads and simultaneously forming second via holes at predetermined locations on the internal layer circuit patterns; forming contact pads for connecting the electrode pads with resistors by filling the first via holes with oxidation-resistant conductive material and flattening the oxidation-resistant conductive material; forming the resistors so that ends of each resistor are connected to two respective contact pads, which are spaced apart from each other; forming circuit patterns on the PCB, in which the second via holes are formed; and layering insulting layers on the PCB having the formed circuit patterns, and forming external layer circuit patterns.