Patents by Inventor Hwa Sun Park

Hwa Sun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7730612
    Abstract: A method of manufacturing a component-embedded printed circuit board is disclosed. The method includes: forming a blind hole in the first metal layer such that the first insulation layer is exposed, for a metal-clad laminate that includes a first metal layer stacked over a first insulation layer, securing a component to the first insulation layer by embedding the component in the blind hole, stacking a second insulation layer and a second metal layer on either side of the metal-clad laminate, and forming circuit patterns by removing portions of the metal layers.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: June 8, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hwa-Sun Park, Sung Yi, Sang-Chul Lee, Jong-Woon Kim, Yul-Kyo Chung
  • Publication number: 20100097770
    Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The manufacturing method of a printed circuit board includes: mounting an electronic device on an upper surface of an adhesive layer; laminating an insulator on an upper side of the electronic device and a lower side of the adhesive layer, respectively, such that the electronic device is buried; and forming a circuit pattern and a via on the insulator.
    Type: Application
    Filed: March 18, 2009
    Publication date: April 22, 2010
    Inventors: Hwa-Sun Park, Yul-Kyo Chung, Jong-Man Kim, One-Cheol Bae
  • Publication number: 20090301766
    Abstract: Disclosed herein is a printed circuit board including an electronic component embedded therein, as the electronic component is supported on the metal layer of core substrate, thus supporting and radiation performances are improved, production costs are reduced, and the manufacturing process is simplified.
    Type: Application
    Filed: July 22, 2008
    Publication date: December 10, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hwa Sun Park, Yul Kyo Chung, Jin Won Lee, Jin Soo Jeong
  • Publication number: 20090244864
    Abstract: Disclosed are a substrate for a capacitor-embedded printed circuit board, a capacitor-embedded printed circuit board, and a manufacturing method thereof. The capacitor-embedded printed circuit board can include a core board, an insulation resin layer, which is stacked on the core board, a first electrode and a first circuit pattern, which are buried in the insulation resin layer, a dielectric layer, which is stacked on a surface of the insulation resin layer, a first adhesive resin layer, which is stacked on the dielectric layer, and a second electrode and a second circuit pattern, which are formed on a surface of the first adhesive resin layer to correspond with the first electrode. With the present invention, the manufacturing process can be simplified and the reliability of products can be improved by reducing the variation of the capacitor (C).
    Type: Application
    Filed: February 4, 2009
    Publication date: October 1, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Woon-Chun Kim, Sung Yi, Hwa-Sun Park, Sang-Chul Lee, Jong-Woo Han, Young-Do Kweon
  • Publication number: 20090049686
    Abstract: A method of manufacturing a component-embedded printed circuit board is disclosed. The method includes: forming a blind hole in the first metal layer such that the first insulation layer is exposed, for a metal-clad laminate that includes a first insulation layer stacked over a first metal layer, securing a component to the first insulation layer by embedding the component in the blind hole, stacking a second insulation layer and a second metal layer on either side of the metal-clad laminate, and forming circuit patterns by removing portions of the metal layers.
    Type: Application
    Filed: April 22, 2008
    Publication date: February 26, 2009
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hwa-Sun Park, Sung Yi, Sang-Chul Lee, Jong-Woon Kim, Yul-Kyo Chung
  • Publication number: 20090025195
    Abstract: A method of manufacturing a capacitor-embedded PCB is disclosed. The method may include fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.
    Type: Application
    Filed: April 22, 2008
    Publication date: January 29, 2009
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Woon-Chun Kim, Sung Yi, Hwa-Sun Park, Hong-Won Kim, Dae-Jun Kim, Jin-Seon Park
  • Publication number: 20080110669
    Abstract: Disclosed herein is a Printed Circuit Board (PCB) having embedded resistors and a method of manufacturing the same, in which contact pads are formed by filling via holes formed on electrode pads with oxidation-resistant conductive material, and resistors are formed on the contact pads. Accordingly, erosion that occurs between the electrode pads and the resistors can be prevented using the contact pads made of oxidation-resistant conductive material, and connections between circuits also can be realized. Furthermore, resistors are formed on a flat plane without any difference in height, attributable to the electrode pads, and thus differences between the resistance values of the built-in resistors can be greatly reduced.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 15, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hwa Sun Park, Tae Eui Kim, Jong Kuk Hong, Sang Jin Baek, Hong Won Kim, Jin Soo Jeong
  • Patent number: 7328504
    Abstract: Disclosed is a method for manufacturing a circuit board, comprising step for preparing an insulating member and an electronic component having position-setting means on the lower surface thereof (S110), step for forming mounting holes in the insulating member (S120), step for mounting the electronic component on the insulating member to meet the position-setting means and the mounting holes (S130), step for forming copper cladding coated with an adhesive on the insulating member (S140), step for applying heat and/or pressure to the copper cladding (S150), and step for forming a via-hole in the copper cladding to be electrically connected to the electronic component, and step for forming a circuit pattern in the copper cladding (S160). The step (S150) can comprise a step (S240) for applying inter-adhesive on respective surfaces of the insulating member, and a step (S250) for applying copper cladding on respective surfaces of the inter-adhesive.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: February 12, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd
    Inventors: Seung Gu Kim, Chang Sup Ryu, Han Seo Cho, Doo Hwan Lee, Hwa Sun Park
  • Patent number: 7037739
    Abstract: A fabrication method of an epilayer structure for InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency. It relates to a P-p-n-N InGaAsP/InP ridge waveguide phase modulator fabricated to be that the phase change of the TE-mode is linearly proportional to the reverse bias voltage at 1.55 ?m wavelength. A method for fabricating an epilayer structure for achieving the optical confinement in the vertical direction of an InGaAsP/InP waveguide phase modulator, characterized by comprising the steps of: forming a first cladding layer of N-InP on an N+-InP substrate; forming a first waveguide layer of n-InGaAsP and a second waveguide layer of p-InGaAsP in sequence on the first cladding layer; forming a second cladding layer of P-InP and a third cladding layer of P-InP in sequence on the second waveguide layer; and forming an electrode layer of p+InGaAs on the third cladding layer.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: May 2, 2006
    Assignee: Korea Institute of Science and Technology
    Inventors: Young Tae Byun, Hwa Sun Park, Seok Lee, Deok Ha Woo, Jong Chang Yi