Abstract: The frequency detector includes a first impedance circuit and a second impedance circuit. The first impedance circuit has a first terminal for receiving an input signal, and a second terminal for outputting a divisional signal. The second impedance circuit has a first terminal coupled to the second terminal of the first impedance circuit, and a second terminal coupled to a first system voltage terminal. The frequency response of the first impedance circuit is different from a frequency response of the second impedance circuit. The resistance of the first impedance circuit, a resistance of the second impedance circuit, and the divisional signal change with a frequency of the input signal.

Abstract: An operational amplifier includes a voltage terminal; a common terminal; a first amplification stage for receiving a differential signal pair to generate a single-end amplification signal; a first buffer for generating a first voltage according to the single-end amplification signal; a first diode for reducing the first voltage to generate a second voltage; a second amplification stage for amplifying the second voltage to generate a third voltage; a voltage stabilizing circuit for stabilizing the third voltage; a second diode coupled between the second amplification stage and the common terminal; a second buffer for generating an output voltage according to the third voltage; and a current mirror coupled to the common terminal, the first amplification stage, the first diode and the second amplification stage.

Abstract: A temperature compensation circuit for a power amplifier is provided, wherein data of circuit configurations corresponding to specific temperatures (including data associated with an output terminal voltage, a bias voltage, an adaptive bias, and a matching impedance of the power amplifier) for the power amplifier is stored in a read-only memory. Therefore, the temperature compensation circuit is capable of reading the data according to a temperature sensing signal to adjust the circuit configuration of the power amplifier accordingly, thereby, in a case of a constant input power of the power amplifier, an output power variance of the power amplifier is within a second interval (e.g., ?10%˜+10%) when an environment temperature varies within a first interval. Therefore, the power amplifier has a stable gain.

Abstract: A logarithmic power detector includes a power distributor, a first detection circuit, a second detection circuit and an output circuit. The power distributor is used to generate a first power signal and a second power signal according to an input signal. The first detection circuit is used to attenuate the first power signal to generate a first rectified signal, filter the first rectified signal to generate a first low-pass signal, and amplify the first low-pass signal to generate a first amplification current. The second detection circuit is used to attenuate the second power signal to generate a second rectified signal, filter the second rectified signal to generate a second low-pass signal, and amplify the second low-pass signal to generate a second amplification current. The output circuit is used to receive the first amplification current and the second amplification current to generate a converted voltage related to the input signal.

Abstract: A temperature compensation circuit for a power amplifier is provided, wherein data of circuit configurations corresponding to specific temperatures (including data associated with an output terminal voltage, a bias voltage, an adaptive bias, and a matching impedance of the power amplifier) for the power amplifier is stored in a read-only memory. Therefore, the temperature compensation circuit is capable of reading the data according to a temperature sensing signal to adjust the circuit configuration of the power amplifier accordingly, thereby, in a case of a constant input power of the power amplifier, an output power variance of the power amplifier is within a second interval (e.g., ?10%˜+10%) when an environment temperature varies within a first interval. Therefore, the power amplifier has a stable gain.

Abstract: A reference voltage generation circuit includes a supply voltage terminal, a node, a current source, an output terminal, a common voltage terminal, a bandgap reference circuit and a feedback circuit. The supply voltage terminal is used to provide a supply voltage. The current source is coupled between the supply voltage terminal and the node, and used to receive the supply voltage and generate a current according to a feedback signal, and output the current to establish at the node a first voltage substantially insensitive to the supply voltage. The common voltage terminal is used to provide a common voltage. The bandgap reference circuit is coupled between the node and the common voltage terminal, and used to establish a temperature-invariant bandgap voltage at the output terminal. The feedback circuit is coupled to the node and the current source, and used to generate the feedback signal according to the first voltage.

Abstract: A power detector has a signal input terminal, N limiting amplifiers, N rectifiers and a signal output terminal. N is an integer greater than 1. The signal input terminal receives an input signal, and the signal output terminal outputs a detection signal. The N limiting amplifiers generate N amplified signals according to N attenuated signals having different attenuation. Each limiting amplifier receives one of the N attenuated signals and outputs one of the N amplified signals. Each rectifier receives a corresponding amplified signal and outputs a rectified signal. The detection signal is associated with the sum of N rectified signals outputted from the N rectifiers, and all transistors of the power detector are bipolar junction transistors.

Abstract: The frequency detector includes a first impedance circuit and a second impedance circuit. The first impedance circuit has a first terminal for receiving an input signal, and a second terminal for outputting a divisional signal. The second impedance circuit has a first terminal coupled to the second terminal of the first impedance circuit, and a second terminal coupled to a first system voltage terminal. The frequency response of the first impedance circuit is different from a frequency response of the second impedance circuit. The resistance of the first impedance circuit, a resistance of the second impedance circuit, and the divisional signal change with a frequency of the input signal.

Abstract: A logarithmic power detector includes a power distributor, a first detection circuit, a second detection circuit and an output circuit. The power distributor is used to generate a first power signal and a second power signal according to an input signal. The first detection circuit is used to attenuate the first power signal to generate a first rectified signal, filter the first rectified signal to generate a first low-pass signal, and amplify the first low-pass signal to generate a first amplification current. The second detection circuit is used to attenuate the second power signal to generate a second rectified signal, filter the second rectified signal to generate a second low-pass signal, and amplify the second low-pass signal to generate a second amplification current. The output circuit is used to receive the first amplification current and the second amplification current to generate a converted voltage related to the input signal.

Abstract: An operational amplifier includes a voltage terminal; a common terminal; a first amplification stage for receiving a differential signal pair to generate a single-end amplification signal; a first buffer for generating a first voltage according to the single-end amplification signal; a first diode for reducing the first voltage to generate a second voltage; a second amplification stage for amplifying the second voltage to generate a third voltage; a voltage stabilizing circuit for stabilizing the third voltage; a second diode coupled between the second amplification stage and the common terminal; a second buffer for generating an output voltage according to the third voltage; and a current mirror coupled to the common terminal, the first amplification stage, the first diode and the second amplification stage.

Abstract: A reference voltage generation circuit includes a supply voltage terminal, a node, a current source, an output terminal, a common voltage terminal, a bandgap reference circuit and a feedback circuit. The supply voltage terminal is used to provide a supply voltage. The current source is coupled between the supply voltage terminal and the node, and used to receive the supply voltage and generate a current according to a feedback signal, and output the current to establish at the node a first voltage substantially insensitive to the supply voltage. The common voltage terminal is used to provide a common voltage. The bandgap reference circuit is coupled between the node and the common voltage terminal, and used to establish a temperature-invariant bandgap voltage at the output terminal. The feedback circuit is coupled to the node and the current source, and used to generate the feedback signal according to the first voltage.

Abstract: A power amplifier configured to amplify a received input signal, and the power amplifier includes a bias circuit and an output stage circuit. The bias circuit includes a reference voltage circuit and a bias generating circuit. The reference voltage circuit receives the first system voltage and provides a reference voltage according to a first system voltage, and the reference voltage changes as the temperature of the wafer changes. The bias generating circuit receives the second system voltage and the reference voltage, and generates an operating voltage. The output stage circuit is coupled to the bias circuit to receive the operating voltage and the driving current to receive and amplify the input signal. When a chip temperature is changed, the bias generating circuit changes the operating voltage according to the reference voltage, such that the driving current approaches a predetermined value as the chip temperature rises.

Abstract: A power amplifier configured to amplify a received input signal, and the power amplifier includes a bias circuit and an output stage circuit. The bias circuit includes a reference voltage circuit and a bias generating circuit. The reference voltage circuit receives the first system voltage and provides a reference voltage according to a first system voltage, and the reference voltage changes as the temperature of the wafer changes. The bias generating circuit receives the second system voltage and the reference voltage, and generates an operating voltage. The output stage circuit is coupled to the bias circuit to receive the operating voltage and the driving current to receive and amplify the input signal. When a chip temperature is changed, the bias generating circuit changes the operating voltage according to the reference voltage, such that the driving current approaches a predetermined value as the chip temperature rises.

Abstract: A power detector has a signal input terminal, N limiting amplifiers, N rectifiers and a signal output terminal. N is an integer greater than 1. The signal input terminal receives an input signal, and the signal output terminal outputs a detection signal. The N limiting amplifiers generate N amplified signals according to N attenuated signals having different attenuation. Each limiting amplifier receives one of the N attenuated signals and outputs one of the N amplified signals. Each rectifier receives a corresponding amplified signal and outputs a rectified signal. The detection signal is associated with the sum of N rectified signals outputted from the N rectifiers, and all transistors of the power detector are bipolar junction transistors.

Abstract: A reference voltage generator includes a voltage generation circuit, an amplifier, a diode unit and a transistor. The voltage generation circuit includes an output terminal for outputting a reference voltage, a first terminal having an operational voltage, and a second terminal. The amplifier includes an input terminal coupled to the first terminal of the voltage generation circuit, an output terminal, a first terminal coupled to a first voltage terminal, and a second terminal. The diode unit includes a first terminal coupled to the second terminal of the amplifier, and a second terminal coupled to the second terminal of the voltage generation circuit and a second voltage terminal. The transistor includes a first terminal coupled to the first terminal of the amplifier, a second terminal coupled to the output terminal of the voltage generation circuit, and a control terminal coupled to the output terminal of the amplifier.

Abstract: A reference voltage generator includes a voltage generation circuit, an amplifier, a diode unit and a transistor. The voltage generation circuit includes an output terminal for outputting a reference voltage, a first terminal having an operational voltage, and a second terminal. The amplifier includes an input terminal coupled to the first terminal of the voltage generation circuit, an output terminal, a first terminal coupled to a first voltage terminal, and a second terminal. The diode unit includes a first terminal coupled to the second terminal of the amplifier, and a second terminal coupled to the second terminal of the voltage generation circuit and a second voltage terminal. The transistor includes a first terminal coupled to the first terminal of the amplifier, a second terminal coupled to the output terminal of the voltage generation circuit, and a control terminal coupled to the output terminal of the amplifier.

Abstract: A signal detector includes a signal input terminal, N first resistors, (N?1) second resistors, a third resistor, M voltage-to-current units and a collection unit. A first terminal of a 1st first resistor is coupled to the signal input terminal. A first terminal of an ith first resistor is coupled to a second terminal of an (i?1)th first resistor. A first terminal of a kth second resistor is coupled to a second terminal of a kth first resistor. A second terminal of each second resistor is coupled to a reference voltage terminal. The third resistor is coupled between the reference voltage terminal and a second terminal of an Nth first resistor. Each voltage-to-current unit is coupled to a first terminal of a corresponding first resistor for converting a corresponding detection voltage to a detection current. The collection unit is coupled to the M voltage-to-current units for generating a detection signal according to at least the M detection currents.

Abstract: A signal detector includes a signal input terminal, N first resistors, (N?1) second resistors, a third resistor, M voltage-to-current units and a collection unit. A first terminal of a 1st first resistor is coupled to the signal input terminal. A first terminal of an ith first resistor is coupled to a second terminal of an (i?1)th first resistor. A first terminal of a kth second resistor is coupled to a second terminal of a kth first resistor. A second terminal of each second resistor is coupled to a reference voltage terminal. The third resistor is coupled between the reference voltage terminal and a second terminal of an Nth first resistor. Each voltage-to-current unit is coupled to a first terminal of a corresponding first resistor for converting a corresponding detection voltage to a detection current. The collection unit is coupled to the M voltage-to-current units for generating a detection signal according to at least the M detection currents.

Abstract: A signal transmitter includes a modulation circuit, a signal separation circuit, and a signal combining circuit. The modulation circuit modulates a first signal to a modulated signal. The signal separation circuit separates the modulated signal into N separated signals. The N separated signals have different phases. The signal combining circuit combines the N separated signals to eliminate at least one order of harmonic signals of the N separated signals so as to generate an output signal.

Abstract: An electronic device includes a substrate, an active circuit, and a shielding structure. The active circuit is formed on the substrate. The shielding structure is disposed surrounding the active circuit, and includes a first heavy ion-doped region, first metal stack, second heavy ion-doped region, second metal stack and top metal. The first heavy ion-doped is formed in the substrate and located at a first side of the active circuit. The first metal stack is formed on the first heavy ion-doped region of the substrate, wherein the first metal stack is connected to a ground voltage. The second heavy ion-doped region is formed in the substrate and located at a second side of the active circuit. The second metal stack is formed on the second heavy ion-doped region of the substrate. The top metal is formed on the first metal stack and second metal stack and passing over the active circuit.