Patents by Inventor Hye-Young Ryu
Hye-Young Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8723179Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.Type: GrantFiled: December 1, 2010Date of Patent: May 13, 2014Assignee: Samsung Display Co., Ltd.Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
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Publication number: 20140093998Abstract: A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.Type: ApplicationFiled: December 2, 2013Publication date: April 3, 2014Applicant: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Jin-Won Lee, Woo-Geun Lee, Hee-Jun Byeon, Xun Zhu
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Patent number: 8604478Abstract: In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.Type: GrantFiled: June 24, 2011Date of Patent: December 10, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Jang-Soo Kim, Su-Hyoung Kang
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Patent number: 8598583Abstract: A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.Type: GrantFiled: April 22, 2011Date of Patent: December 3, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Jin-Won Lee, Woo-Geun Lee, Hee-Jun Byeon, Xun Zhu
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Patent number: 8598577Abstract: A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.Type: GrantFiled: July 7, 2011Date of Patent: December 3, 2013Assignee: Samsung Display Co., Ltd.Inventors: Jae-Woo Park, Dong-Hoon Lee, Sung-Haeng Cho, Woo-Geun Lee, Hye-Young Ryu, Young-Joo Choi
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Publication number: 20130306972Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a gate line positioned on the substrate; a gate insulating layer positioned on the gate line; a semiconductor layer positioned on the gate insulating layer and having a channel portion; a data line including a source electrode and a drain electrode, the source and drain electrodes both positioned on the semiconductor layer; a passivation layer positioned on the data line and the drain electrode and having a contact hole formed therein; and a pixel electrode positioned on the passivation layer, wherein the pixel electrode contacts the drain electrode within the contact hole, and the channel portion of the semiconductor layer and the contact hole both overlap the gate line in a plan view of the substrate.Type: ApplicationFiled: December 21, 2012Publication date: November 21, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Hye Young RYU, Ki Won KIM, Jae Woo PARK, Kap Soo YOON, Young Joo CHOI
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Patent number: 8530893Abstract: A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 1016/cm3 to 1019/cm3.Type: GrantFiled: August 8, 2011Date of Patent: September 10, 2013Assignee: Samsung Display Co., Ltd.Inventors: Ki-Won Kim, Kyoung-Jae Chung, Hye-Young Ryu, Young-Joo Choi, Seung-Ha Choi, Kap-Soo Yoon
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Publication number: 20130214299Abstract: A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.Type: ApplicationFiled: September 14, 2012Publication date: August 22, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Hye Young RYU, Hee Jun BYEON, Woo Geun LEE, Kap Soo YOON, Yoon Ho KIM, Chun Won BYUN
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Patent number: 8426228Abstract: Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.Type: GrantFiled: July 12, 2011Date of Patent: April 23, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Hyang-Shik Kong, Byung-Duk Yang, Kyung-Sook Jeon
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Patent number: 8305507Abstract: A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.Type: GrantFiled: February 17, 2006Date of Patent: November 6, 2012Assignee: Samsung Display Co., Ltd.Inventors: Hye-Young Ryu, Jang-Soo Kim, Sang-Gab Kim, Hong-Kee Chin, Min-Seok Oh, Hee-Hwan Choe, Shi-Yul Kim
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Patent number: 8216865Abstract: A display device includes a gate pattern, a semiconductor pattern, a source pattern and a pixel electrode are provided. The gate pattern is formed on a base substrate and includes a gate line and a gate electrode. The semiconductor pattern is formed on the base substrate having the gate pattern and includes an oxide semiconductor. The source pattern is formed from a data metal layer and formed on the base substrate having the semiconductor pattern, and includes a data line, a source electrode and a drain electrode. The data metal layer includes a first copper alloy layer, and a lower surface of the data metal layer substantially coincides with an upper surface of the semiconductor pattern. The pixel electrode is formed on the base substrate having the source pattern and electrically connected to the drain electrode. Thus, manufacturing processes may be simplified, and reliability may be improved.Type: GrantFiled: May 3, 2010Date of Patent: July 10, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Joo Choi, Woo-Geun Lee, Hye-Young Ryu, Ki-Won Kim
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Patent number: 8173493Abstract: The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.Type: GrantFiled: April 22, 2010Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Gab Kim, Woo-Geun Lee, Shi-Yul Kim, Jin-Ho Ju, Jang-Soo Kim, Sang-Woo Whangbo, Min-Seok Oh, Hye-Young Ryu, Hong-Kee Chin
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Publication number: 20120037911Abstract: A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 1016/cm3 to 1019/cm3.Type: ApplicationFiled: August 8, 2011Publication date: February 16, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ki-Won Kim, Kyoung-Jae Chung, Hye-Young Ryu, Young-Joo Choi, Seung-Ha Choi, Kap-Soo Yoon
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Publication number: 20120037906Abstract: A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.Type: ApplicationFiled: May 24, 2011Publication date: February 16, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hye-Young RYU, Woo-Geun LEE, Young-Joo CHOI, Kyoung-Jae CHUNG, Jin-Won LEE, Seung-Ha CHOI, Hee-Jun BYEON, Pil-Sang YUN
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Publication number: 20120018720Abstract: A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.Type: ApplicationFiled: July 7, 2011Publication date: January 26, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Woo PARK, Dong-Hoon LEE, Sung-Haeng CHO, Woo-Geun LEE, Hye-Young RYU, Young-Joo CHOI
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Publication number: 20110284852Abstract: A thin-film transistor includes a semiconductor pattern, a first gate electrode, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern is formed on a substrate. A first conductive layer has a pattern that includes the first gate electrode which is electrically insulated from the semiconductor pattern. A second conductive layer has a pattern that includes a source electrode electrically connected to the semiconductor pattern, a drain electrode spaced apart from the source electrode, and a second gate electrode electrically connected to the first gate electrode. The second gate electrode is electrically insulated from the semiconductor pattern, the source electrode and the drain electrode.Type: ApplicationFiled: March 16, 2011Publication date: November 24, 2011Inventors: Ki-Won KIM, Kap-Soo Yoon, Woo-Geun Lee, Yeong-Keun Kwon, Hye-Young Ryu, Jin-Won Lee, Hyun-Jung Lee
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Publication number: 20110272696Abstract: A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.Type: ApplicationFiled: April 22, 2011Publication date: November 10, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hye-Young RYU, Jin-Won LEE, Woo-Geun LEE, Hee-Jun BYEON, Xun ZHU
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Publication number: 20110269254Abstract: Contamination is blocked from material of a color filter layer provided on a thin-film transistors (TFT) supporting substrate by sealing over the color filter layer with an inorganic insulating layer. During mass production manufacture, a plasma surface cleaning step is employed after the color filter layer is deposited but before the inorganic insulating layer is deposited. A low temperature CVD process is used to deposit the inorganic insulating layer with a substantially uniform thickness conformably over the color filter layer including conformably into openings provided through the color filter layer.Type: ApplicationFiled: July 12, 2011Publication date: November 3, 2011Inventors: Hye-Young Ryu, Hyang-Shik Kong, Byung-Duk Yang, Kyung-Sook Jeon
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Publication number: 20110254007Abstract: In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.Type: ApplicationFiled: June 24, 2011Publication date: October 20, 2011Inventors: Hye-Young RYU, Jang-Soo Kim, Su-Hyoung Kang
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Patent number: 8013945Abstract: A display substrate includes a gate line, a gate insulating layer, a data line, a thin-film transistor (TFT), a storage line, a passivation layer, a color filter layer, a pixel electrode, a first light-blocking layer and a second light-blocking layer. The storage line includes the same material as the gate line. The passivation layer covers the data line. The color filter layer is formed on the passivation layer. The pixel electrode is formed on the color filter layer in each pixel. The first light-blocking layer is formed between adjacent pixel electrodes, and includes the same material as the gate line. The second light-blocking layer is formed between the first light-blocking layer, and includes the same material as the data line. Therefore, an aperture ratio may be increased.Type: GrantFiled: December 27, 2007Date of Patent: September 6, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Kyoung-Ju Shin, Shi-Yul Kim, Hye-Young Ryu, Mee-Hye Jung, Jang-Soo Kim, Su-Hyoung Kang