Patents by Inventor Hyeok Kang
Hyeok Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11424624Abstract: A transmitter circuit includes a drive circuit including; a drive circuit disposed in a first electronic device and configured to generate a setting signal and transmit the setting signal via a channel from the first electronic device to a second electronic device connected to the channel, a current source array configured to provide a current signal to the drive circuit, and a current controller configured to control the current source array, wherein the current signal provided by the current source array increases over a period extending from a first edge of the setting signal to a subsequent second edge of the setting signal.Type: GrantFiled: June 22, 2020Date of Patent: August 23, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Min Hyeok Kang, Jun Ho Kim
-
Publication number: 20210135465Abstract: A transmitter circuit includes a drive circuit including; a drive circuit disposed in a first electronic device and configured to generate a setting signal and transmit the setting signal via a channel from the first electronic device to a second electronic device connected to the channel, a current source array configured to provide a current signal to the drive circuit, and a current controller configured to control the current source array, wherein the current signal provided by the current source array increases over a period extending from a first edge of the setting signal to a subsequent second edge of the setting signal.Type: ApplicationFiled: June 22, 2020Publication date: May 6, 2021Inventors: MIN HYEOK KANG, JUN HO KIM
-
Patent number: 10480433Abstract: A method and apparatus for calculating an internal exhaust gas recirculation (EGR) amount of an engine include a continuously variable valve duration (CVVD) apparatus. The internal EGR amount is calculated by correcting a backflow gas amount based on a valve duration changed by operation of the continuously variable valve duration apparatus during valve overlap of an intake valve or an exhaust valve.Type: GrantFiled: December 12, 2017Date of Patent: November 19, 2019Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Min-Kyu Won, Hyung-Soo Do, Soo-Hyeok Kang, Dae-Woo Kim
-
Patent number: 10400685Abstract: A method for correction of intake pulsation is provided. The method includes calculating a basic air charge amount of a cylinder or a charge amount conversion coefficient based on a measurement value of a sensor disposed in an intake system of an engine. A basic pulsation compensation coefficient for correcting an intake amount from a basic waveform of pulsation is calculated based on opening/closing of an intake valve and engine RPM. The basic pulsation compensation coefficient is then corrected when the basic waveform of the pulsation is changed.Type: GrantFiled: December 27, 2017Date of Patent: September 3, 2019Assignees: Hyundai Motor Company, Kia Motors CorporationInventors: Min-Kyu Won, Hyung-Soo Do, Soo-Hyeok Kang, Dae-Woo Kim
-
Publication number: 20190085775Abstract: A method for correction of intake pulsation is provided. The method includes calculating a basic air charge amount of a cylinder or a charge amount conversion coefficient based on a measurement value of a sensor disposed in an intake system of an engine. A basic pulsation compensation coefficient for correcting an intake amount from a basic waveform of pulsation is calculated based on opening/closing of an intake valve and engine RPM. The basic pulsation compensation coefficient is then corrected when the basic waveform of the pulsation is changed.Type: ApplicationFiled: December 27, 2017Publication date: March 21, 2019Inventors: Min-Kyu Won, Hyung-Soo Do, Soo-Hyeok Kang, Dae-Woo Kim
-
Publication number: 20190085777Abstract: A method and apparatus for calculating an internal exhaust gas recirculation (EGR) amount of an engine include a continuously variable valve duration (CVVD) apparatus. The internal EGR amount is calculated by correcting a backflow gas amount based on a valve duration changed by operation of the continuously variable valve duration apparatus during valve overlap of an intake valve or an exhaust valve.Type: ApplicationFiled: December 12, 2017Publication date: March 21, 2019Inventors: Min-Kyu Won, Hyung-Soo Do, Soo-Hyeok Kang, Dae-Woo Kim
-
Patent number: 8789984Abstract: An organic light emitting display device has the function of buffering external impacts so as to improve the resistance of the organic light emitting display device to impact. An electronic device includes the organic light emitting display device. The organic light emitting display device includes: a frame; a first substrate disposed on the frame, a display unit being formed on a surface of the first substrate; a second substrate disposed so as to face the first substrate; a driver integrated circuit (IC) disposed on either the first substrate or the second substrate; and a buffer member formed so as to cover the driver IC.Type: GrantFiled: September 29, 2011Date of Patent: July 29, 2014Assignee: Samsung Display Co., Ltd.Inventors: Hyun-Hee Lee, Kyu-Seob Han, Tae-Hyeok Kang
-
Patent number: 8641240Abstract: An electronic device improves an impact-resistance characteristic of an organic light emitting diode (OLED) display. The electronic device includes an organic light emitting diode (OLED) display including a panel assembly for forming an organic light emitting element, and a housing including a housing main body for receiving the organic light emitting diode (OLED) display. The housing includes a housing main body including a first space for receiving the panel assembly and a second space for receiving a printed circuit board, an upper cover, and a lower cover. The housing main body includes a bottom formed to distinguish a first space and a second space in the housing, and also includes a bent unit on an edge, and a side wall in which the bent unit is buried to be combined with the edge of the bottom.Type: GrantFiled: December 27, 2011Date of Patent: February 4, 2014Assignee: Samsung Display Co., Ltd.Inventors: Chan-Hee Wang, Dai-Han Cho, Hyun-Hee Lee, Min-Su Kim, Chan-Kyoung Moon, Dong-Su Yee, Tae-Hyeok Kang, Ji-Young Wang, Kyu-Hyeong Cheon, Kyu-Seob Han
-
Patent number: 8625042Abstract: A display device is disclosed. In one embodiment, the device includes a display panel displaying an image and an integrated receiving member supporting the display panel. The integrated receiving member includes a press molding portion including a bottom portion and a side wall portion bent and extended from the bottom portion and having a through-hole formed therein and an injection molding portion including a frame portion integrally attached to at least one side of the press molding portion, facing the display panel and a flange portion extended from the frame portion and protruding through the through-hole. The flange portion of the injection molding portion is wholly or partially separated from the side wall portion of the press molding portion within the through-hole.Type: GrantFiled: March 8, 2011Date of Patent: January 7, 2014Assignee: Samsung Display Co., Ltd.Inventors: Kyu-Hyeong Cheon, Dai-Han Cho, Chan-Kyoung Moon, Hyun-Hee Lee, Min-Su Kim, Hyun-Chuel Kim, Ji-Young Wang, Chan-Hee Wang, Tae-Hyeok Kang, Dong-Su Yee, Kyu-Seob Han
-
Publication number: 20120212966Abstract: An electronic device improves an impact-resistance characteristic of an organic light emitting diode (OLED) display. The electronic device includes an organic light emitting diode (OLED) display including a panel assembly for forming an organic light emitting element, and a housing including a housing main body for receiving the organic light emitting diode (OLED) display. The housing includes a housing main body including a first space for receiving the panel assembly and a second space for receiving a printed circuit board, an upper cover, and a lower cover. The housing main body includes a bottom formed to distinguish a first space and a second space in the housing, and also includes a bent unit on an edge, and a side wall in which the bent unit is buried to be combined with the edge of the bottom.Type: ApplicationFiled: December 27, 2011Publication date: August 23, 2012Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.Inventors: Chan-Hee Wang, Dai-Han Cho, Hyun-Hee Lee, Min-Su Kim, Chan-Kyoung Moon, Dong-Su Yee, Tae-Hyeok Kang, Ji-Young Wang, Kyu-Hyeong Cheon, Kyu-Seob Han
-
Publication number: 20120099251Abstract: A display device is disclosed. In one embodiment, the device includes a display panel displaying an image and an integrated receiving member supporting the display panel. The integrated receiving member includes a press molding portion including a bottom portion and a side wall portion bent and extended from the bottom portion and having a through-hole formed therein and an injection molding portion including a frame portion integrally attached to at least one side of the press molding portion, facing the display panel and a flange portion extended from the frame portion and protruding through the through-hole. The flange portion of the injection molding portion is wholly or partially separated from the side wall portion of the press molding portion within the through-hole.Type: ApplicationFiled: March 8, 2011Publication date: April 26, 2012Applicant: Samsung Mobile Display Co., Ltd.Inventors: Kyu-Hyeong Cheon, Dai-Han Cho, Chan-Kyoung Moon, Hyun-Hee Lee, Min-Su Kim, Hyun-Chuel Kim, Ji-Young Wang, Chan-Hee Wang, Tae-Hyeok Kang, Dong-Su Yee, Kyu-Seob Han
-
Publication number: 20120098426Abstract: An organic light emitting display device has the function of buffering external impacts so as to improve the resistance of the organic light emitting display device to impact. An electronic device includes the organic light emitting display device. The organic light emitting display device includes: a frame; a first substrate disposed on the frame, a display unit being formed on a surface of the first substrate; a second substrate disposed so as to face the first substrate; a driver integrated circuit (IC) disposed on either the first substrate or the second substrate; and a buffer member formed so as to cover the driver IC.Type: ApplicationFiled: September 29, 2011Publication date: April 26, 2012Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.Inventors: Hyun-Hee Lee, Kyu-Seob Han, Tae-Hyeok Kang
-
Patent number: 7512010Abstract: Provided is a voltage regulator of a flash memory device. Embodiments of the invention provide a voltage regulator that is configured to regulate either an internal pumping voltage or an external high voltage. In embodiments of the invention, the voltage regulator includes two switches having different switching current characteristics: when regulating the internal pumping voltage, the voltage regulator is configured to activate a switch having a relatively high switching current to output the regulated voltage; but when regulating the high external voltage, the voltage regulator is configured to activate a switch having a relatively low switching current to output the regulated voltage during at least a set-up time. In an embodiment of the invention, the voltage regulator may be configured to activate both switches to regulate the high external voltage after the set-up time.Type: GrantFiled: June 11, 2007Date of Patent: March 31, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Ji-Ho Cho, Hyeok Kang
-
Publication number: 20070297238Abstract: Provided is a voltage regulator of a flash memory device. Embodiments of the invention provide a voltage regulator that is configured to regulate either an internal pumping voltage or an external high voltage. In embodiments of the invention, the voltage regulator includes two switches having different switching current characteristics: when regulating the internal pumping voltage, the voltage regulator is configured to activate a switch having a relatively high switching current to output the regulated voltage; but when regulating the high external voltage, the voltage regulator is configured to activate a switch having a relatively low switching current to output the regulated voltage during at least a set-up time. In an embodiment of the invention, the voltage regulator may be configured to activate both switches to regulate the high external voltage after the set-up time.Type: ApplicationFiled: June 11, 2007Publication date: December 27, 2007Applicant: SAMSUNG ELECTRONICS CO,. LTD.Inventors: Ji-Ho CHO, Hyeok KANG
-
Patent number: 7102925Abstract: A flash memory device including a boot location select signal for selecting location of a boot region is generated by coding it in a CFI block, generated depending on the state of the OTP cell in the protection block, or generated by applying the power supply voltage or the ground voltage as a metal option. The bank select circuit needs not be modified even though location of the boot region is changed. It is thus possible to shorten development time, simplify a verification work and reduce the size of a chip.Type: GrantFiled: June 27, 2003Date of Patent: September 5, 2006Assignee: Hynix Semiconductor Inc.Inventor: Hyeok Kang
-
Publication number: 20040219729Abstract: The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or a bowing profile phenomenon in a cross-sectioned etch profile of a contact hole. To achieve this effect, the attack barrier layer or the capping layer is additionally deposited on the profile containing self-aligned contact holes in order to prevent an undercut of the inter-layer insulation layer, which is a main cause of the seam generations. Also, the attack barrier layer has a function of preventing the inter-layer insulation layer from being attacked during the wet cleaning/etching process. Ultimately, it is possible to improve device characteristics with the prevention of the seam generations.Type: ApplicationFiled: June 27, 2003Publication date: November 4, 2004Inventor: Hyeok Kang
-
Patent number: 6784084Abstract: The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or a bowing profile phenomenon in a cross-sectioned etch profile of a contact hole. To achieve this effect, the attack barrier layer or the capping layer is additionally deposited on the profile containing self-aligned contact holes in order to prevent an undercut of the inter-layer insulation layer, which is a main cause of the seam generations. Also, the attack barrier layer has a function of preventing the inter-layer insulation layer from being attacked during the wet cleaning/etching process. Ultimately, it is possible to improve device characteristics with the prevention of the seam generations.Type: GrantFiled: June 27, 2003Date of Patent: August 31, 2004Assignee: Hynix Semiconductor Inc.Inventors: Hyeok Kang, Sung-Kwon Lee, Min-Suk Lee
-
Publication number: 20040082162Abstract: The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or a bowing profile phenomenon in a cross-sectioned etch profile of a contact hole. To achieve this effect, the attack barrier layer or the capping layer is additionally deposited on the profile containing self-aligned contact holes in order to prevent an undercut of the inter-layer insulation layer, which is a main cause of the seam generations. Also, the attack barrier layer has a function of preventing the inter-layer insulation layer from being attacked during the wet cleaning/etching process. Ultimately, it is possible to improve device characteristics with the prevention of the seam generations.Type: ApplicationFiled: June 27, 2003Publication date: April 29, 2004Inventors: Hyeok Kang, Sung-Kwon Lee, Min-Suk Lee
-
Patent number: 6388472Abstract: A word line decoder is characterized in that addresses for decoding word lines are divided into a global word line and a local word line, and if said global word line is selected, a voltage generated at said local word line is applied to a selected word line, but if said global word line is not selected, the voltage applied to said word line is passed to a ground terminal.Type: GrantFiled: November 27, 2000Date of Patent: May 14, 2002Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Hyeok Kang
-
Patent number: 6289366Abstract: An shift circuit is used in an arithmetic unit, for shifting m-bit input data to left or in right, m being a positive integer. The shift circuit includes a latch for temporarily storing the m-bit input data and additional 2n-bit, wherein n is a positive integer; a shift logic block, receiving (m+2n)-bit data from the latch means, for providing (2n+1) number of m-bit shifted data; a sensor for generating a selection signal based on a predetermined shift condition; and a multiplexer, in response to the selection signal, for selecting one of the (2n+1) number of m-bit shifted data as an output signal of the apparatus.Type: GrantFiled: May 22, 1998Date of Patent: September 11, 2001Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Sun Ju Park, Hyeok Kang