Abstract: A walk-in and folding apparatus for a seat includes a locking link installed on a cushion frame by an elastic hinge, and connected with a locking unit via a first wire so as to, upon rotation, release the locked locking unit, and a walk-in pin installed on a frame of a seat back by another elastic hinge, protruding towards the locking link so as to, upon folding of the frame of the seat back, force the locking link to rotate, and connected with a folding lever in such a manner as to rotate in association with the same so as to, upon a folding action caused by operation of the folding lever, rotate so that it does not interfere with the locking link.

Abstract: A phase change memory device and a write method thereof allow writing of both volatile and non-volatile data on the phase change memory device. The phase change memory device may be written by setting a write mode as one of a volatile write mode and a non-volatile write mode, and writing data as volatile or non-volatile by applying a write pulse corresponding to the write mode, wherein, when power is not supplied to the phase change memory device, the non-volatile data is retained and the volatile data is not retained.

Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

Abstract: A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

Abstract: An automotive seat cushion with a drain device may include a seat cushion including a cushion pad which is disposed inside the seat cushion and a covering which is disposed outside the cushion pad and is connected to the cushion pad by a hog ring, a passenger classification sensor which is disposed between the cushion pad and the covering and detects whether a seat is occupied by an occupant or not, a drain hole which is formed by vertically penetrating the seat cushion, and a drain hole guide member which is inserted into the drain hole and engaged thereto to maintain a shape of the drain hole.

Abstract: A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory cells includes executing first through (N?1)th page programming operations, using an incremental step pulse programming (ISPP) method, to program first through (N?1)th data pages in the MLC memory cells, where each of the first through (N?1)th page programming operations includes an erase programming of erase cells among the MLC memory cells. The method further includes executing an Nth page programming operation, using the ISPP method, to program an Nth data page in the MLC memory cells.

Abstract: A method of programming a non-volatile memory including N-bit multi-level cell (MLC) memory includes executing an incremental step pulse programming (ISPP) operation on the MLC memory cells, where the ISPP operation includes a programming sequence of first through Nth page programming operations, where N is an integer of 2 or more.

Abstract: An automotive seat cushion with a drain device may include a seat cushion including a cushion pad which is disposed inside the seat cushion and a covering which is disposed outside the cushion pad and is connected to the cushion pad by a hog ring, a passenger classification sensor which is disposed between the cushion pad and the covering and detects whether a seat is occupied by an occupant or not, a drain hole which is formed by vertically penetrating the seat cushion, and a drain hole guide member which is inserted into the drain hole and engaged thereto to maintain a shape of the drain hole.

Abstract: A multi-bit memory cell stores information corresponding to a high resistive state and multiple other resistive states lower than the high resistive state. A resistance of a memory element within the multi-bit memory cell switches from the high resistive state to one of the other multiple resistive states by applying a corresponding current to the memory element.

Abstract: A non-volatile memory device which can be highly-integrated without a decrease in reliability, and a method of fabricating the same, are provided. In the non-volatile memory device, a first doped layer of a first conductivity type is disposed on a substrate. A semiconductor pillar of a second conductivity type opposite to the first conductivity type extends upward from the first doped layer. A first control gate electrode substantially surrounds a first sidewall of the semiconductor pillar. A second control gate electrode substantially surrounds a second sidewall of the semiconductor pillar and is separated from the first control gate electrode. A second doped layer of the first conductivity type is disposed on the semiconductor pillar.

Abstract: In a memory device and in a method of programming the same, a memory device comprises: a plurality of memory cells, each memory cell comprising a resistance-changeable material that has an initial resistance that is determined in response to an applied programming current in a programming operation; and a modification circuit that modifies the resistance of the memory cell following a programming operation of the memory cell to vary the resistance of the memory cell from the initial resistance to a second resistance by applying a saturation current in a saturation operation. Each memory cell is connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation, that is used to apply the saturation current to the corresponding memory cell in the saturation operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a subsequent read operation.

Abstract: A walk-in and folding apparatus for a seat includes a locking link installed on a cushion frame by means of an elastic hinge, and connected with a locking unit via a first wire so as to, upon rotation, release the locked locking unit, and a walk-in pin installed on a frame of a seat back by means of another elastic hinge, protruding towards the locking link so as to, upon folding of the frame of the seat back, force the locking link to rotate, and connected with a folding lever in such a manner as to rotate in association with the same so as to, upon a folding action caused by operation of the folding lever, rotate so that it does not interfere with the locking link.

Abstract: Methods of forming integrated circuit devices include forming at least one non-volatile memory cell on a substrate. The memory cell includes a plurality of phase-changeable material regions therein that are electrically coupled in series. This plurality of phase-changeable material regions are collectively configured to support at least 2-bits of data when serially programmed using at least four serial program currents. Each of the plurality of phase-changeable material regions has different electrical resistance characteristics when programmed.

Abstract: In a method of controlling resistance drift in a memory cell of a resistance-changeable material memory device, the resistance changeable material in the memory cell is treated so that a drift parameter for the memory cell is less than about 0.18, wherein a change in resistance of a memory cell over the time period is determined according to the relationship: Rdrift=Rinitial×t?; where Rdrift represents a final resistance of the memory cell following the time period, Rinitial represents the initial resistance of the memory cell following the programming operation, t represents the time period; and ? represents the drift parameter.

Abstract: A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a first region of the chalcogenide element and has a first cross-sectional area. A second contact is connected to a second region of the chalcogenide element and having a second cross-sectional area. A first programmable volume of the chalcogenide material is defined in the first region of the chalcogenide element, a state of the first programmable volume being programmable according to a resistance associated with the first contact. A second programmable volume of the chalcogenide material is defined in the second region of the chalcogenide element, a state of the second programmable volume being programmable according to a second resistance associated with the second contact.

Abstract: Non-volatile memory devices include an array of phase-changeable memory cells, which have first phase-changeable material patterns therein, and at least one phase-changeable fuse element. This phase-changeable fuse element includes a second phase-changeable material pattern therein with a higher crystallization temperature relative to the first phase-changeable material patterns in the array of phase-changeable memory cells. This higher crystallization temperature may be greater than about 300° C. According to additional embodiments of the present invention, the at least one phase-changeable fuse element includes a composite of the second phase-changeable material pattern and a third phase-changeable material pattern, which is formed of the same material at the first phase-changeable material patterns.

Abstract: Disclosed is a method for forming a buffer layer for growing gallium nitride single crystals on a sapphire substrate using hydride vapor phase epitaxy (HVPE), wherein the buffer layer is formed in the form of a doped vertical gallium nitride (GaN) single crystal film with a nanoporosity of 0.10 to 0.15 ?m on the sapphire substrate by reacting HCl and NH3 as a Group III/V mix gas. The nanoporous buffer layer interposed on the interface between the sapphire substrate and galluim nitride reduces tensile stress generated by the difference in thermal expansion coefficient between gallium nitride and the sapphire substrate, enables growth of the gallium nitride layer to a thickness of 1 micrometer (m) to several millimeters (nm) without causing cracks, and reduces the lattice constant difference to improve crystallinity.

Abstract: Provided is a resistive memory device that can be integrated with a high integration density and method of forming the same.

Abstract: Provided is a resistive memory device that can be integrated with a high integration density and method of forming the same. An insulating layer enclosing a resistive memory element and an insulating layer enclosing a conductive line connected with the resistive memory element have different stresses, hardness, porosity degrees, dielectric constant or heat conductivities.

Abstract: A phase change memory device and a write method thereof allow writing of both volatile and non-volatile data on the phase change memory device. The phase change memory device may be written by setting a write mode as one of a volatile write mode and a non-volatile write mode, and writing data as volatile or non-volatile by applying a write pulse corresponding to the write mode, wherein, when power is not supplied to the phase change memory device, the non-volatile data is retained and the volatile data is not retained.