Patents by Inventor Hyeong-Joon Kim
Hyeong-Joon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12248947Abstract: A banking processing method according is performed by a processing logic including an application for banking processing implemented on a user terminal and a computer-readable storage medium. The method comprises the steps of: when the application for banking processing is run, searching a hardware security area of the user terminal and confirming the existence of a certificate for confirming an execution history of the application for banking processing; when the existence of the certificate is confirmed, searching the security area and confirming the existence of a token key for identifying whether login information of the user has been set; when the existence of the token key is not confirmed, setting the login information of the user by providing a membership page for setting the login information of the user; and opening an account according to a request of the user whose login information has been set.Type: GrantFiled: March 25, 2019Date of Patent: March 11, 2025Assignee: KAKAOBANK CORP.Inventors: Jung Hee Ko, Tae Ki Ha, Yeun Su Koo, Bo Hyun Oh, Lee Rang Park, Sung Jun Kim, Ji Hong Park, Dong Joon Lee, Jung Min Ahn, Geun Won Mo, Hyeong Jin Jang, Jun Hyuk Yun, Hack Cheon Kim, Eun Jung Gil, Ji Eun Kim, Tae Won Kim, Seung Jin Lee, Do Young Lee
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Patent number: 12006392Abstract: The present invention relates to a post-processing apparatus configured to post-process latex, the post-processing apparatus including: a receiving tank having therein a receiving part and having an inlet port through which the latex is introduced into the receiving part and a discharge port through which the latex is discharged; an ultrasonic wave generating device configured to generate ultrasonic waves to the latex accommodated in the receiving tank; a pressure reducing part configured to reduce a pressure of the receiving part of the receiving tank to discharge an unreacted monomer to the outside of the receiving tank; and a partition part provided in the receiving part of the receiving tank and comprising a plurality of partitions disposed in a direction from the inlet port toward the discharge port of the receiving tank, in which the latex accommodated in the receiving part moves along upper and lower sides of the plurality of partitions.Type: GrantFiled: April 16, 2021Date of Patent: June 11, 2024Assignee: LG CHEM, LTD.Inventors: Se Woong Lee, Young Man Song, Hyeong Joon Kim, Hyun Min Lee
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Publication number: 20240106642Abstract: A data processing method of a trusted execution environment using a smart contract of the present invention comprises the steps of: a data processing platform server generating, according to a smart contract distributed on a blockchain, a trusted execution environment including a data processing code and an encryption key in response to a data processing request received from a client device; the trusted execution environment acquiring, from a data-owned device, first data encrypted by the encryption key; the trusted execution environment decoding the first data; the trusted execution environment generating the result of data processing by processing the decoded first data according to the data processing code; the trusted execution environment providing the result of data processing to the client device; and the trusted execution environment being self-destroyed according to the smart contract.Type: ApplicationFiled: November 8, 2023Publication date: March 28, 2024Inventor: Hyeong-Joon Kim
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Publication number: 20220387960Abstract: The present invention relates to a post-processing apparatus configured to post-process latex, the post-processing apparatus including: a receiving tank having therein a receiving part and having an inlet port through which the latex is introduced into the receiving part and a discharge port through which the latex is discharged; an ultrasonic wave generating device configured to generate ultrasonic waves to the latex accommodated in the receiving tank; a pressure reducing part configured to reduce a pressure of the receiving part of the receiving tank to discharge an unreacted monomer to the outside of the receiving tank; and a partition part provided in the receiving part of the receiving tank and comprising a plurality of partitions disposed in a direction from the inlet port toward the discharge port of the receiving tank, in which the latex accommodated in the receiving part moves along upper and lower sides of the plurality of partitions.Type: ApplicationFiled: April 16, 2021Publication date: December 8, 2022Applicant: LG CHEM, LTD.Inventors: Se Woong LEE, Young Man SONG, Hyeong Joon KIM, Hyun Min LEE
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Patent number: 10892409Abstract: The present invention relates to a switching device, a method of fabricating the same, and a nonvolatile memory device including the same. A switching device according to an embodiment of the present invention includes a first electrode; a second electrode; and a switching film which is disposed between the first electrode and the second electrode, and includes an electrically insulating matrix and a conductive path formed in the electrically insulating matrix. In this embodiment, the conductive path includes crystalline metal clusters dispersed in the electrically insulating matrix and a metal bridge connecting adjacent crystalline metal clusters.Type: GrantFiled: January 18, 2019Date of Patent: January 12, 2021Assignees: SK hynix Inc., Seoul National University R&DB FoundationInventors: Hyeong Joon Kim, Ji Woon Park, Young Seok Kim
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Patent number: 10680206Abstract: A display apparatus including a substrate, a display panel on the substrate, and an encapsulation film sealing the display panel. The encapsulation film includes at least one organic layer and/or at least one inorganic layer and at least one pair of conductive layers.Type: GrantFiled: May 10, 2018Date of Patent: June 9, 2020Assignees: Samsung Display Co., Ltd., Seoul National University R&DB FoundationInventors: Min-Ho Oh, Yoon-Hyeung Cho, Yong-Tak Kim, So-Young Lee, Jong-Woo Kim, Ji-Young Moon, Hyeong-Joon Kim, Sang-Hyun Park, Hyuk-Jin Kim, Seung-Ha Oh
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Patent number: 10629624Abstract: A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.Type: GrantFiled: August 16, 2017Date of Patent: April 21, 2020Assignees: SAMSUNG DISPLAY CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jae Heung Ha, Jong Woo Kim, Ji Young Moon, Min Ho Oh, Seung Jae Lee, Yoon Hyeung Cho, Young Cheol Joo, Hyeong Joon Kim, Eun-Kil Park, Sang Jin Han
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Publication number: 20190221739Abstract: The present invention relates to a switching device, a method of fabricating the same, and a nonvolatile memory device including the same. A switching device according to an embodiment of the present invention includes a first electrode; a second electrode; and a switching film which is disposed between the first electrode and the second electrode, and includes an electrically insulating matrix and a conductive path formed in the electrically insulating matrix. In this embodiment, the conductive path includes crystalline metal clusters dispersed in the electrically insulating matrix and a metal bridge connecting adjacent crystalline metal clusters.Type: ApplicationFiled: January 18, 2019Publication date: July 18, 2019Inventors: Hyeong Joon KIM, Ji Woon PARK, Young Seok KIM
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Patent number: 10276694Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.Type: GrantFiled: October 27, 2016Date of Patent: April 30, 2019Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Ha-Jin Lim, Hyeong-Joon Kim, Nae-In Lee
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Publication number: 20180261801Abstract: A display apparatus including a substrate, a display panel on the substrate, and an encapsulation film sealing the display panel. The encapsulation film includes at least one organic layer and/or at least one inorganic layer and at least one pair of conductive layers.Type: ApplicationFiled: May 10, 2018Publication date: September 13, 2018Inventors: Min-Ho OH, Yoon-Hyeung CHO, Yong-Tak KIM, So-Young LEE, Jong-Woo KIM, Ji-Young MOON, Hyeong-Joon KIM, Sang-Hyun PARK, Hyuk-Jin KIM, Seung-Ha OH
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Patent number: 9972807Abstract: A display apparatus is provided. The display apparatus includes a substrate, a display panel on the substrate, and an encapsulation film sealing the display panel. The encapsulation film includes at least one organic layer and/or at least one inorganic layer and at least one pair of conductive layers.Type: GrantFiled: March 11, 2014Date of Patent: May 15, 2018Assignees: Samsung Display Co., Ltd., Seoul National University R&DB FoundationInventors: Min-Ho Oh, Yoon-Hyeung Cho, Yong-Tak Kim, So-Young Lee, Jong-Woo Kim, Ji-Young Moon, Hyeong-Joon Kim, Sang-Hyun Park, Hyuk-Jin Kim, Seung-Ha Oh
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Publication number: 20180061865Abstract: A thin film transistor array panel includes a substrate, a gate insulating layer, an interface layer, and a semiconductor layer. The gate insulating layer is disposed on the substrate. The interface layer is disposed on the gate insulating layer. The semiconductor layer is disposed on the interface layer. The interface layer includes a fluorinated silicon oxide. The semiconductor layer includes a p-type oxide semiconductor material.Type: ApplicationFiled: August 16, 2017Publication date: March 1, 2018Inventors: Jae Heung Ha, Jong Woo Kim, Ji Young Moon, Min Ho Oh, Seung Jae Lee, Yoon Hyeung Cho, Young Cheol Joo, Hyeong Joon Kim, Eun-Kil Park, Sang Jin Han
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Publication number: 20170047433Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.Type: ApplicationFiled: October 27, 2016Publication date: February 16, 2017Applicant: Seoul National University R&DB FoundationInventors: Ha-Jin Lim, Hyeong-Joon Kim, Nae-In Lee
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Patent number: 9515186Abstract: A semiconductor device includes a semiconductor substrate including a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate 5 structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.Type: GrantFiled: January 22, 2015Date of Patent: December 6, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Ha-Jin Lim, Hyeong-Joon Kim, Nae-In Lee
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Patent number: 9090477Abstract: A method of manufacturing silica nanowires includes: providing an object to be processed into a reaction chamber; supplying a precursor having a heteroleptic structure, which has a chemical formula SiA2B2 (A and B are different functional groups), into the reaction chamber; supplying an oxygen-containing gas that preferentially reacts with any one of the functional groups A and B of the precursor; and growing an intermediate on a surface of the object to be processed due to a reaction between the precursor and the oxygen-containing gas.Type: GrantFiled: December 30, 2010Date of Patent: July 28, 2015Assignee: SNU R&DB FOUNDATIONInventors: Sanghyun Park, Jaeyeong Heo, Hyeong Joon Kim
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Publication number: 20150206974Abstract: A semiconductor device includes a semiconductor substrate comprising a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.Type: ApplicationFiled: January 22, 2015Publication date: July 23, 2015Inventors: Ha-Jin Lim, Hyeong-Joon Kim, Nae-In Lee
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Publication number: 20150042346Abstract: A display apparatus is provided. The display apparatus includes a substrate, a display panel on the substrate, and an encapsulation film sealing the display panel. The encapsulation film includes at least one organic layer and/or at least one inorganic layer and at least one pair of conductive layers.Type: ApplicationFiled: March 11, 2014Publication date: February 12, 2015Applicants: Seoul National University R&DB Foundation, Samsung Display Co., Ltd.Inventors: Min-Ho OH, Yoon-Hyeung Cho, Yong-Tak Kim, So-Young Lee, Jong-Woo Kim, Ji-Young Moon, Hyeong-Joon Kim, Sang-Hyun Park, Hyuk-Jin Kim, Seung-Ha Oh
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Publication number: 20110159286Abstract: Provided is a method of manufacturing silica nanowires. The method includes: providing an object to be processed into a reaction chamber; supplying a precursor having a heteroleptic structure, which has a chemical forma SiA2B2 (A and B are different functional groups), into the reaction chamber; supplying an oxygen-containing gas that preferentially reacts with any one of the functional groups A and B of the precursor; and growing an intermediate on a surface of the object to be processed due to a reaction between the precursor and the oxygen-containing gas.Type: ApplicationFiled: December 30, 2010Publication date: June 30, 2011Applicant: ISNU R&DB FOUNDATIONInventors: Sanghyun Park, Jaeyeong Heo, Hyeong Joon Kim
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Patent number: 7355324Abstract: The present invention relates to a film bulk acoustic wave device and a method of manufacturing the same, wherein comprising an acoustic reflective layer which is formed on a substrate by removing a sacrificial layer on the substrate and becomes an empty space; an oxidation protective film or etch protecting film which is formed in a pattern that divides a resonance region to form the acoustic reflective layer on the sacrificial layer; a thermal oxidation film which is formed by partially thermally oxidizing the sacrificial layer in an electrode region where the oxidation protective film or the etch protecting film is not formed; and a lower electrode, a piezoelectric thin film, and an upper electrode all of which are disposed on the thermal oxide. Further, the present invention is directed to a method of manufacturing the same.Type: GrantFiled: July 21, 2004Date of Patent: April 8, 2008Assignee: Sangshin Elecom Co., LtdInventors: Hyeong Joon Kim, Jae Bin Lee, Heung Rae Kim, Ki Bong Yeo, Young-Soo Lee
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Patent number: 6545387Abstract: A surface acoustic wave (SAW) filter comprising as a substrate a piezoelectric single crystal having the composition of formula (I) with high dielectric and piezoelectric constants, low temperature coefficient and good electromechanical properties has a high piezoelectric constant, a low insertion loss, and a broad bandwidth in a high frequency region, and therefore can be useful for preparing a SAW filter for high frequency telecommunication systems: x(A)y(B)z(C)—p(P)n(N) (I) wherein, (A) is Pb(Mg1/3Nb2/3)O3 or Pb(Zn1/3Nb2/3)O3, (B) is PbTiO3, (C) is LiTaO3, (P) is a metal selected from Pt, Au, Ag, Pd and Rh, (N) is an oxide of a metal selected from Ni, Co, Fe, Sr, Sc, Ru, Cu and Cd, x is a number of 0.65 to 0.98, y is a number of 0.01 to 0.34, z is a number of 0.01 to 0.1, and p and n are each independently a number of 0.01 to 5.Type: GrantFiled: March 30, 2001Date of Patent: April 8, 2003Assignee: Ibule Photonics Co., Ltd.Inventors: Sang-Goo Lee, Jin-Yong Kim, Hyeong-Joon Kim