Patents by Inventor Hyo-Seung Nam

Hyo-Seung Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099105
    Abstract: A display device and method for manufacturing thereof are provided. The display device includes a substrate having a display area and a non-display area, and including an edge, an upper surface having an edge area in which a processing trace remains adjacent to the edge, a bottom surface opposite to the upper surface, a side surface connected to the upper surface and not parallel thereto, and a first inclined surface connected to the side surface and to the bottom surface, a light-emitting element layer above the upper surface of the substrate in the display area, and including light-emitting elements, an encapsulating layer above the light-emitting element layer and corresponding to a portion of the display area and the non-display area, and a protective layer above an outer surface of the substrate, and located on at least one of the bottom surface, the side surface, or the first inclined surface.
    Type: Application
    Filed: May 9, 2023
    Publication date: March 21, 2024
    Inventors: Wan Jung KIM, Dae Sang YUN, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, So Young LEE, Young Hoon LEE
  • Publication number: 20240096273
    Abstract: A display device includes: a substrate including a display area and a non-display area surrounding the display area; a light emitting element layer on the display area on the substrate and including a plurality of light emitting elements; and an encapsulating layer on the light emitting element layer and on a portion of the display area and the non-display area; and wherein the substrate comprises an upper surface on which the light emitting element layer is located, a bottom surface opposite to the upper surface, a side surface connected to the upper surface and not parallel to the upper surface, and a first inclined surface connected to the side surface and the bottom surface and not parallel to the side surface and the bottom surface, wherein an edge area of the upper surface of the substrate adjacent to an edge of the substrate, in which a processing trace remains.
    Type: Application
    Filed: July 12, 2023
    Publication date: March 21, 2024
    Inventors: Wan Jung KIM, Dae Sang YUN, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, So Young LEE, Young Hoon LEE
  • Publication number: 20240081139
    Abstract: A display device includes: a substrate comprising an upper surface, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface; and a light emitting element layer on the upper surface of the substrate, wherein the substrate comprises a side surface that meets the upper surface in the through hole, a first surface that meets the bottom surface, a second surface that meets the side surface, and a third surface between the first surface and the second surface, and wherein the first surface and the second surface are spaced apart from each other with the third surface therebetween, and are inclined surfaces.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: Hyo Young MUN, Yi Seul UM, Wan Jung KIM, Kyung Ah NAM, Yong Seung PARK, Dae Sang YUN, So Young LEE, Young Hoon LEE
  • Publication number: 20240074258
    Abstract: An electronic device includes a display device, which may be fabricated using a described method. The display device includes a glass substrate including a first surface, a second surface opposite the first surface, and a side surface between the first surface and the second surface, an outermost structure on the first surface of the glass substrate and located adjacent to an edge of one side of the glass substrate, and a display area including a plurality of light emitting areas on the first surface of the glass substrate and located farther from the edge of the one side of the glass substrate than the outermost structure is. A minimum distance from the side surface of the glass substrate to the outermost structure is equal to 130 ?m or less.
    Type: Application
    Filed: May 5, 2023
    Publication date: February 29, 2024
    Inventors: Wan Jung KIM, Dong Jo KIM, Sun Hwa KIM, Young Ji KIM, Chang Sik KIM, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, Dae Sang YUN, Kwan Hee LEE, So Young LEE, Young Hoon LEE, Young Seo CHOI, Sun Young KIM, Ji Won SOHN, Do Young LEE, Seung Hoon LEE
  • Patent number: 10045436
    Abstract: A printed circuit board and a method of manufacturing the same. In one embodiment, a printed circuit board includes: a core made of a glass material; an insulator surrounding the core; and a via connecting internal circuit layers through the core and the insulator.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: August 7, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Hyeon Cho, Hyo Seung Nam, Yong Sam Lee, Seok Hwan Ahn
  • Patent number: 9235129
    Abstract: The present invention provides a composition for developing a photoresist containing a carboxyl group (—COOH) and a method of developing a photoresist using the composition. The composition includes: a first solution including a salt containing a monovalent cationic component; and a second solution including a salt containing a bivalent cationic component. The composition for photoresist development is advantageous in that the developing depth of a photoresist can be controlled, and the developed surface of a photoresist is flat, thereby enabling the photoresist to be developed to realize precise three-dimensional packaging.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: January 12, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chang Bo Lee, Chang Sup Ryu, Dae Jo Hong, Hyo Seung Nam
  • Publication number: 20150373833
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. According to an exemplary embodiment of the present disclosure, a printed circuit board includes: an insulating layer; a first outer layer circuit pattern formed in a lower portion of the insulating layer to be embedded in the insulating layer; and a second outer layer circuit pattern formed on the insulating layer to protrude from the insulating layer.
    Type: Application
    Filed: September 16, 2014
    Publication date: December 24, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Ho BAEK, Hyo Seung Nam, Jae Hoon Choi, Eung Suek Lee, Jeong Ho Lee
  • Publication number: 20150342054
    Abstract: Embodiments of the invention provide an embedded coreless substrate, and a method for manufacturing the same. According to an embodiment of the present invention, an embedded coreless substrate includes an insulating layer, a conductive pattern including a plurality of circuit pattern layers formed in(on) the insulating layer and a plurality of vias for vertically connecting the circuit pattern layers, and at least one embedded device, which is partially embedded in the insulating layer and an outer circuit pattern layer among the plurality of circuit pattern layers and of which an electrode in an embedded portion is partially or entirely covered with the outer circuit pattern layer to fix the embedded portion, is provided. Further, a method for manufacturing an embedded coreless substrate is provided.
    Type: Application
    Filed: March 24, 2015
    Publication date: November 26, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Ho BAEK, Hyo Seung NAM, Jae Ean LEE, Ju Yeon BONG, Jung Hyun CHO, Kyung Hwan KO
  • Publication number: 20150195902
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes: an insulating layer; a first circuit buried below the insulating layer and having a lower surface formed to be exposed from a lower surface of the insulating layer; a second circuit layer formed on the insulating layer; and a first solder resist layer formed below the insulating layer and the first circuit layer and formed to expose a portion of the first circuit layer.
    Type: Application
    Filed: January 8, 2015
    Publication date: July 9, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Suek LEE, Hyo Seung NAM, Sung Uk LEE, Jae Hoon CHOI, II Jong SEO, Yong Ho BAEK
  • Publication number: 20150156860
    Abstract: A solder resist opening structure that exposes an electrode pad through a solder resist opening. The solder resist opening has a bottom diameter of about 80 ?m or less with a first tolerance less than about 2.5 ?m, the bottom diameter being smaller than a diameter of the electrode pad; an inverted trapezoidal cross section with a top diameter larger than the bottom diameter; and a diameter difference between the top diameter and the bottom diameter of about 10 ?m or more with a second tolerance less than about 2.
    Type: Application
    Filed: May 15, 2014
    Publication date: June 4, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chang Bo LEE, Dae Jo HONG, Hyo Seung NAM
  • Publication number: 20150129293
    Abstract: A printed circuit board and a method of manufacturing the same. In one embodiment, a printed circuit board includes: a core made of a glass material; an insulator surrounding the core; and a via connecting internal circuit layers through the core and the insulator.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 14, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon CHO, Hyo Seung NAM, Yong Sam LEE, Seok Hwan AHN
  • Publication number: 20150107880
    Abstract: Disclosed herein is a multilayer printed circuit board. The multilayer printed circuit board according to the present invention includes: a stack via stacked in an upper portion of a core layer; staggered vias formed at both sides of the stack via and stacked on the core layer; and a solder resist layer stacked in a lower portion of the core layer and stacked on an insulating film except for open regions of the stack via and the staggered vias, such that the plurality of vias formed in the staggered via may increase rigidity to prevent warpage of the multilayer printed circuit board from being generated.
    Type: Application
    Filed: June 30, 2014
    Publication date: April 23, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hye Jin KIM, Hyo Seung Nam, Tae Hong Min, Sang Hoon Kim, Suk Hyeon Cho, Jung Han Lee
  • Publication number: 20140370446
    Abstract: The present invention provides a composition for developing a photoresist containing a carboxyl group (—COOH) and a method of developing a photoresist using the composition. The composition includes: a first solution including a salt containing a monovalent cationic component; and a second solution including a salt containing a bivalent cationic component. The composition for photoresist development is advantageous in that the developing depth of a photoresist can be controlled, and the developed surface of a photoresist is flat, thereby enabling the photoresist to be developed to realize precise three-dimensional packaging.
    Type: Application
    Filed: February 4, 2014
    Publication date: December 18, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chang Bo Lee, Chang Sup Ryu, Dae Jo Hong, Hyo Seung Nam
  • Publication number: 20140166355
    Abstract: Disclosed herein is a method of manufacturing a printed circuit board, the method including: (a) performing a hole processing process on one surface of a core layer to process a first via hole having a predetermined height hl; (b) performing a plating process on one surface of the core layer to form a first via electrode in the first via hole and form a first metal layer on one surface of the core layer; (c) performing a hole processing process on the other surface of the core layer to process a second via hole having a predetermined height h2 exposing a lower surface of the first via electrode to the outside; and (d) performing a plating process on the other surface of the core layer to form a second via electrode in the second via hole and form a second metal layer on the other surface of the core layer.
    Type: Application
    Filed: July 26, 2013
    Publication date: June 19, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Gi Hong, Jeong Woo Lee, Going Sik Kim, Hyo Seung Nam
  • Publication number: 20140099433
    Abstract: The present invention relates to a basket jig for an electroless plating apparatus and an electroless plating method. A basket jig for an electroless plating apparatus in accordance with the present invention includes a basket loaded thereon a plurality of printed circuit boards, a rotating structure coupled to top portions of both sides of the basket and a tube in a shape of a rectangular plate coupled to bottom portions of the basket.
    Type: Application
    Filed: March 14, 2013
    Publication date: April 10, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyo Seung NAM, Chang Sup Ryu
  • Publication number: 20140076618
    Abstract: There is provided a method of forming a gold thin film, the method including: forming a nickel plating layer on a surface of an object through electroless nickel (Ni) plating; forming a palladium-copper mixture plating layer on the nickel plating layer through electroless plating using a palladium-copper (Pd—Cu) mixture; and forming a first gold thin film by immersing the palladium-copper mixture plating layer in a gold (Au) galvanic electrolytic liquid to replace a portion of copper (Cu) particles in the palladium-copper mixture plating layer with gold particles through a replacement reaction.
    Type: Application
    Filed: December 3, 2012
    Publication date: March 20, 2014
    Applicants: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY, Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seong Min CHO, Chan Hwa CHUNG, Chang Yong AN, Chang Sup RYU, Hyo Seung NAM
  • Publication number: 20140069816
    Abstract: Disclosed herein are a nickel plating solution and a method for forming a nickel layer on an external electrode of a chip component by using the nickel plating solution, the nickel plating solution including: a nickel ion; a chloride ion; and a pH buffer, wherein the pH buffer is used by mixing an inorganic acid, and an organic acid and a salt thereof, so that the damage to a body of the chip component can be reduced by containing organic acid and a salt thereof in the nickel plating solution for forming the nickel plating layer on the external electrode of the chip component having a body formed of a material including ferrite or manganese oxide.
    Type: Application
    Filed: March 14, 2013
    Publication date: March 13, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Geum KIM, Hyo Seung NAM
  • Publication number: 20140069805
    Abstract: Disclosed herein is an electro-copper plating apparatus in which a cathode, an insoluble anode, a copper ball, and a plating solution are included in a single bath, wherein the plating solution includes manganese oxide; or an electro-copper plating apparatus including: a main bath including a cathode, an insoluble anode, and a plating solution; and a dissolution bath including a copper ball, and manganese oxide. According to the present invention, the manganese oxide having higher oxidation-reduction potential instead of using Fe3+ of the related art as the copper source in the electro-copper plating apparatus may be used to obtain a high effect in suppressing surface plating even at a low concentration.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 13, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyo Seung NAM, Mi Geum KIM
  • Publication number: 20120123574
    Abstract: A method of plating a substrate and a method of manufacturing a circuit board using the method of plating a substrate. The method of manufacturing a circuit board may include: providing a panel substrate, the panel substrate divided into a circuit board area and a dummy area; calculating a ratio of an area of a circuit pattern to be formed by plating in the circuit board area; determining a ratio of an area being plated in the dummy area by considering the ratio of the area being plated in the circuit board area; setting a plating part in the circuit board area and the dummy area; and forming the circuit pattern by electroplating the panel substrate. Accordingly, deviation in thickness of plating between circuit patterns can be improved.
    Type: Application
    Filed: September 6, 2011
    Publication date: May 17, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong-Ho Moon, Kwang-Ok Jeong, Hyo-Seung Nam
  • Publication number: 20120031550
    Abstract: A method for forming a plating layer and a method for forming a printed circuit board using the same are disclosed. The method for forming a plating layer in accordance with an embodiment of the present invention can include: providing a metal foil coated with a primer resin layer on one surface thereof, roughness formed the one surface of the primer resin layer; transcribing the primer resin layer, on which roughness is formed, to an insulation layer; reducing the primer resin layer so that an anticorrosive material of the metal foil that remains on the primer resin layer is removed; and plating the primer resin layer, on which roughness is formed.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong-Ho Moon, Kwang-Ok Jeong, Won-Gyu Park, Hyo-Seung Nam