Abstract: Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.

Abstract: A method and an apparatus for providing reference signal received power (RSRP) are disclosed herein. According to one embodiment, a signal is received in a modem. Signal elements at reference signal (RS) locations are extracted from the received signal. The signal elements are descrambled to remove a RS sequence. A linear average of the descrambled signal elements is performed to form virtual reference signal (VRS) elements. The RSRP is estimated from the VRS elements.

Abstract: A system for providing ongoing verification of released software components utilizes feedback from a pool of devices that each locally execute a verification component. The verification component randomly selects one or more locally-executing software components, captures information associated with the randomly-selected software components responsive to detection of events satisfying one or more capture conditions, and communicates the captured information to a software component verification and analysis service. The total number of the randomly-selected software components within the verification pool is set to statistically guarantee that each one of the software components available for random selection is randomly selected on at least one of the plurality of processing devices within the verification pool.

Abstract: Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.

Abstract: Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A method and an apparatus for providing reference signal received power (RSRP) are disclosed herein. According to one embodiment, a signal is received in a modem. Signal elements at reference signal (RS) locations are extracted from the received signal. The signal elements are descrambled to remove a RS sequence. A linear average of the descrambled signal elements is performed to form virtual reference signal (VRS) elements. The RSRP is estimated from the VRS elements.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: Interaction between operating system components and device drivers via device driver function call addresses is monitored. Each device driver is configured to interface with at least one hardware component of a computing system. One or more verification functions of an extended device driver verification component are registered for at least one of the device driver function call addresses, each defining a predetermined verification condition. A device driver function call to one of the device driver function call addresses is intercepted and evaluated against the predetermined verification condition of the verification function registered for the device driver function call address of the intercepted device driver function.

Abstract: Methods, a Base Station (BS), and a User Equipment (UE) in a wireless communication system for transmitting and receiving control information are provided. The method for transmitting control information by a BS in a wireless communication system includes receiving information related to a signal transmitted by a second BS that the second BS which is a neighboring BS of the first BS, determining whether a second UE using an identical resource to that used by a first UE included in a cell of the first BS exists within a cell of the second BS based on the received information, when the second UE exists, generating control information for controlling a signal transmitted to the second UE by the second BS based on the received information, and transmitting the generated control information to the first UE through a control channel.

Abstract: Interaction between operating system components and device drivers via device driver function call addresses is monitored. Each device driver is configured to interface with at least one hardware component of a computing system. One or more verification functions of an extended device driver verification component are registered for at least one of the device driver function call addresses, each defining a predetermined verification condition. A device driver function call to one of the device driver function call addresses is intercepted and evaluated against the predetermined verification condition of the verification function registered for the device driver function call address of the intercepted device driver function.

Abstract: Interaction between operating system components and device drivers via device driver function call addresses is monitored. Each device driver is configured to interface with at least one hardware component of a computing system. One or more verification functions of an extended device driver verification component are registered for at least one of the device driver function call addresses, each defining a predetermined verification condition. A device driver function call to one of the device driver function call addresses is intercepted and evaluated against the predetermined verification condition of the verification function registered for the device driver function call address of the intercepted device driver function.

Abstract: A system for providing ongoing verification of released software components utilizes feedback from a pool of devices that each locally execute a verification component. The verification component randomly selects one or more locally-executing software components, captures information associated with the randomly-selected software components responsive to detection of events satisfying one or more capture conditions, and communicates the captured information to a software component verification and analysis service. The total number of the randomly-selected software components within the verification pool is set to statistically guarantee that each one of the software components available for random selection is randomly selected on at least one of the plurality of processing devices within the verification pool.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: A sense amplifier includes a sense amplifying unit, first and second isolation units, and first and second offset cancellation unit. The sense amplifying unit includes a first P-type metal-oxide-semiconductor (PMOS) transistor, a second PMOS transistor, a first N-type metal-oxide-semiconductor (NMOS) transistor, and a second NMOS transistor. In a layout of the sense amplifier, the first and second PMOS transistors are disposed in a central region of the sense amplifier, the first and second NMOS transistors are disposed at opposite sides of the sense amplifier from each other, the first isolation unit and the first offset cancellation unit are disposed between the first PMOS transistor and the first NMOS transistor, and the second isolation unit and the second offset cancellation unit are disposed between the second PMOS transistor and the second NMOS transistor. In other layouts, the locations of the PMOS transistors and NMOS transistors may be reversed.

Abstract: An electronic device is disclosed. The disclosed electronic device includes a memory for storing a key for unlocking a door lock, a communication module for receiving location information, and a processor electrically connected to the memory and the communication module. The processor reads a plurality of keys from the memory based on the location information received via the communication module, and transmits the read plurality of keys to the door lock sequentially.

Abstract: Systems and methods are described for verifying functionality of a computing device. A set of rules are sent to a computing device identifying a device driver. Data is received from the one device that is indicative of collected driver data of the computing device. The data is collected by a driver verifier function executing on the computing device. The driver verifier function is configured to capture information associated with the identified device driver identified by the set of rules. The received data is parsed to categorize the data with previously collected driver data of other computing devices. The data is categorized based on attributes of the collected driver data. The categorized data is provided for analysis of the driver health on the computing device.

Abstract: Systems and methods are described for verifying functionality of a computing device. Rules are received that are usable to configure a driver verifier function to capture information associated with a device driver identified by the rules. The configured driver verifier function is run on a computing device. The information is captured in response to driver conditions identified by the rules. The computing device is allowed to continue operation when the driver condition includes an error condition of the identified device driver. A communication is initiated to transmit the captured information to a driver verification analysis service.