Abstract: A semiconductor device includes: a lower structure; a redistribution insulating layer disposed over the lower structure; a redistribution conductive layer disposed over the redistribution insulating layer and electrically connected to a part of the lower structure, the redistribution conductive layer including a redistribution pad; and a protective layer covering the redistribution insulating layer and the redistribution conductive layer while leaving the redistribution pad exposed. The redistribution conductive layer includes a trench disposed adjacent to the redistribution pad, and a part of the protective layer fills the trench.

Abstract: A method of fabricating a semiconductor package may include forming a plating layer on a surface of a substrate body. A circuit resist pattern and a monitoring resist pattern may be formed on the plating layer, and the plating layer may be etched using the circuit resist pattern and the monitoring resist pattern as etch masks, thereby forming circuit patterns and sub-patterns of a monitoring pattern. A residual rate of the circuit patterns may be monitored by inspecting the number of the sub-patterns of the monitoring pattern remaining on the substrate body after an etch process for forming the circuit patterns and the sub-patterns of the monitoring pattern. A semiconductor chip may be bonded to the circuit patterns using inner connectors.

Abstract: Disclosed is a semiconductor package. The semiconductor package includes a substrate including an opening, a first semiconductor chip, disposed on the substrate, including a plurality of first chip pads exposed through the opening, a second semiconductor chip, disposed on the first semiconductor chip to partially overlap with the first semiconductor chip, including a plurality of second chip pads, aligned with the opening, and a redistribution layer formed on a surface on which the second chip pads of the second semiconductor chip are disposed. One or more of the second chip pads overlaps with the first semiconductor chip and is covered by the first semiconductor chip and with the remaining pads of the second chip pads being exposed through the opening. The redistribution layer includes redistribution pads, exposed through the opening, and includes redistribution lines, configured to connect the one or more of the second chip pads to the redistribution pads.

Abstract: A method of fabricating a semiconductor package may include forming a plating layer on a surface of a substrate body. A circuit resist pattern and a monitoring resist pattern may be formed on the plating layer, and the plating layer may be etched using the circuit resist pattern and the monitoring resist pattern as etch masks, thereby forming circuit patterns and sub-patterns of a monitoring pattern. A residual rate of the circuit patterns may be monitored by inspecting the number of the sub-patterns of the monitoring pattern remaining on the substrate body after an etch process for forming the circuit patterns and the sub-patterns of the monitoring pattern. A semiconductor chip may be bonded to the circuit patterns using inner connectors.

Abstract: A semiconductor chip module includes a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned; redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads, and extending in a direction oblique to the first direction toward the scribe line region; and redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the redistribution lines.

Abstract: A semiconductor chip module includes a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned; redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads, and extending in a direction oblique to the first direction toward the scribe line region; and redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the redistribution lines.

Abstract: A semiconductor chip module includes a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned; redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads, and extending in a direction oblique to the first direction toward the scribe line region; and redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the redistribution lines.

Abstract: A semiconductor device includes, a semiconductor chip having a first surface over which bonding pads are positioned, a second surface which faces away from the first surface, and a plurality of signal lines formed over the first surface, extending in a first direction; a plurality of redistribution lines formed over the first surface, having one set of ends electrically coupled to the bonding pads of the semiconductor chip, and extending in a direction oblique to the first direction; and a plurality of redistribution pads disposed over the first surface, and electrically coupled with an other set of ends of the redistribution lines which face away from the one set of ends.

Abstract: A semiconductor device includes, a semiconductor chip having a first surface over which bonding pads are positioned, a second surface which faces away from the first surface, and a plurality of signal lines formed over the first surface, extending in a first direction; a plurality of redistribution lines formed over the first surface, having one set of ends electrically coupled to the bonding pads of the semiconductor chip, and extending in a direction oblique to the first direction; and a plurality of redistribution pads disposed over the first surface, and electrically coupled with an other set of ends of the redistribution lines which face away from the one set of ends.

Abstract: A semiconductor chip module includes a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned; redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads, and extending in a direction oblique to the first direction toward the scribe line region; and redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the redistribution lines.

Abstract: Package substrates are provided. The package substrate includes a core layer having a first surface defining trench portions and ridge portions between the trench portions, at least one first trace on a bottom surface of each of the trench portions, and second traces on respective ones of top surfaces of the ridge portions. Related methods are also provided.

Abstract: A semiconductor device includes a semiconductor chip and an inner interconnection structure. The semiconductor chip includes a front surface that exposes first connection terminals and a rear surface that is opposite to the front surface and exposes second connection terminals separated from the first connection terminals. The inner interconnection structure includes horizontal buried conductive lines and vertical connection lines disposed to pierce the semiconductor chip to connect the first connection terminals and the second connection terminals.

Abstract: A semiconductor chip includes a body part having a first surface and a second surface facing away from the first surface, and an opening passing from the first surface to the second surface of the body part.

Abstract: A semiconductor chip includes a body part having a first surface and a second surface facing away from the first surface, and an opening passing from the first surface to the second surface of the body part.

Abstract: A semiconductor chip module includes a first semiconductor chip possessing a first surface and a second surface which faces away from the first surface, and having a first transmission and reception unit which includes at least two light emitting sections and at least two light receiving sections arranged in a form of a matrix on the first surface and configured to transmit and receive optical signals; and a second semiconductor chip disposed over the first surface of the first semiconductor chip, and having a second transmission and reception unit which includes at least two light emitting sections and at least two light receiving sections arranged in a form of a matrix on a surface of the second semiconductor chip facing the first semiconductor chip and configured to transmit and receive optical signals.

Abstract: A semiconductor device includes a semiconductor chip and an inner interconnection structure. The semiconductor chip includes a front surface that exposes first connection terminals and a rear surface that is opposite to the front surface and exposes second connection terminals separated from the first connection terminals. The inner interconnection structure includes horizontal buried conductive lines and vertical connection lines disposed to pierce the semiconductor chip to connect the first connection terminals and the second connection terminals.

Abstract: A method for controlling a portable device, a display device, and a video system is provided. According to the method for controlling the portable device, the portable device transmits an application to the display device, the portable device and the display device execute the application, the portable device receives specific information from a user and transmits the specific information to the display device, and the display device controls an execution of the application according to the specific information. Therefore, a user may control a display device using a portable device.

Abstract: A system for providing a game includes: a sponsor-league-providing-server which transmits a sponsor league list to an electronic device according to a sponsor league selection signal received from the electronic device, and transmits advertisement data registered in a particular sponsor league when executing a game corresponding the particular sponsor league selected from the sponsor league list. An electronic device requests a sponsor league list to the sponsor-league-providing-server and receives the sponsor league list in case the sponsor league is selected from a menu list of game mode, and displays a game execution screen including advertisement data at one side when a game corresponding to the particular sponsor league is executed.

Abstract: A data structure for implementing a traffic engineering function in a multiprotocol label switching system comprises: a subscriber profile including a plurality of entries for storing forwarding equivalence class (FEC) information required for setup of a label switched path (LSP) based on the traffic engineering function, the entries of the subscriber profile being sequentially assigned indexes corresponding to one traffic engineering service subscriber identification (ID); a path profile including a plurality of entries for storing respective path information items regarding a type length value (TLV) of a signal protocol required for setup of an explicit routed label switched ath (ER-LSP) based on the traffic engineering function, the entries of the path profile being sequentially assigned indexes corresponding to respective path information items; and a quality of service (QoS) profile including a plurality of entries for storing respective QoS information items regarding a TLV of a signal protocol required

Abstract: A data structure for implementing a traffic engineering function in a multiprotocol label switching system comprises: a subscriber profile including a plurality of entries for storing forwarding equivalence class (FEC) information required for setup of a label switched path (LSP) based on the traffic engineering function, the entries of the subscriber profile being sequentially assigned indexes corresponding to one traffic engineering service subscriber identification (ID); a path profile including a plurality of entries for storing respective path information items regarding a type length value (TLV) of a signal protocol required for setup of an explicit routed label switched ail path (ER-LSP) based on the traffic engineering function, the entries of the path profile being sequentially assigned indexes corresponding to respective path information items; and a quality of service (QoS) profile including a plurality of entries for storing respective QoS information items regarding a TLV of a signal protocol req