Abstract: An adsorbent is provided to adsorb ruthenium from aqueous solution for recovery and/or reuse or removal of said ruthenium, and a method for purifying, for example, sea water and/or water containing sodium ions, magnesium ions, calcium ions, chlorine ions or other ions, polluted with a radioactive element, using said adsorbent. The ruthenium adsorbent includes manganese in the form of oxides thereof. The adsorbent can further include at least one additional transition metal element other than manganese, such as copper. The adsorbent soaked in water removes radioactive ruthenium or the like through adsorption, and thereby can purify, for example, sea water and/or water containing sodium ions, magnesium ions, calcium ions, chlorine ions or other ions.

Abstract: A method for manufacturing a catalyst that oxidatively decomposes ethylene, carbon monoxide, formaldehyde, etc., at high efficiency even at low temperatures, wherein discharge of harmful gases such as halogens during the manufacture is reduced. Further, a method for manufacturing a low-temperature oxidation catalyst including: (1) a step for causing a non-halogen-containing noble metal compound to be supported on a carrier; (2) a step for reducing the noble metal compound on the carrier obtained in step (1); (3) a step for causing a halide to be supported on the carrier obtained in step (2); and (4) a step for drying the carrier obtained in step (3) and obtaining a low-temperature oxidation catalyst.

Abstract: A catalyst for oxidizing a substance such as ethylene, carbon monoxide, or formaldehyde at high efficiency even at a low temperature of 100° C. or below, such as room temperature or below. Further, an oxidation catalyst of a low-temperature substance in which a noble metal and a metal halogen salt other than that of a noble metal are supported on a metal oxide carrier.

Abstract: A method of operating a semiconductor memory device can include receiving data, from a memory controller, at an Error Correction Code (ECC) engine included in the semiconductor memory device, the data including at least one predetermined error. Predetermined parity can be received at the ECC engine, where the predetermined parity is configured to correspond to the data without the at least one predetermined error. A determination can be made whether a number of errors in the data is correctable by the ECC engine using the data including the at least one predetermined error and the predetermined parity.

Abstract: The present invention relates to a cell membrane-mimicking brush polymer having surface properties mimicking a cell membrane and a self-assembly capability by means of a cell membrane mimicking functional group introduced to a brush terminal, and a method for preparing same.

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

Abstract: A method of operating a semiconductor memory device can include receiving data, from a memory controller, at an Error Correction Code (ECC) engine included in the semiconductor memory device, the data including at least one predetermined error. Predetermined parity can be received at the ECC engine, where the predetermined parity is configured to correspond to the data without the at least one predetermined error. A determination can be made whether a number of errors in the data is correctable by the ECC engine using the data including the at least one predetermined error and the predetermined parity.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: A method for operating an electronic device according to an embodiment of the present invention may comprise: if an occurrence of a notification is detected, determining an application related to the notification or a keyword extractable from the notification; determining whether feedback of a user for the notification occurs; and storing preference information of the user for the application or the keyword based on the feedback. Also, other embodiments are possible.

Abstract: A smart home service which is capable of providing an environment in which calling a control command for a device is available via a user terminal protocol to control between the device and a user terminal based on different type of protocol and a control method for the same. The smart home service server connecting at least one device operated based on a first protocol to at least one user terminal operated based on a second protocol, includes an application programming interface (API) controller configured to allow a control command for the at least one device to be called via the second protocol of the at least one user terminal; a filter configured to convert the called control command according to the first protocol; and a control command transmitter configured to transmit the control command converted according to the first protocol, to the at least one device.

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: A method for communicating data by an electronic device is provided. The method includes transmitting a signal including audio/video (A/V) data to a first external electronic device through a first communication module, while connected with the first external electronic device, generating data or a signal unrelated to the A/V data or receiving the data or signal unrelated to the A/V data from an external electronic device other than the first external electronic device, and providing an audio or a video through a display or an embedded sound device based on at least a portion of the data or the signal unrelated to the A/V data or transmitting the at least a portion of the data or the signal unrelated to the A/V data to a second external electronic device through a second communication module.

Abstract: A method of operating a semiconductor memory device can include receiving data, from a memory controller, at an Error Correction Code (ECC) engine included in the semiconductor memory device, the data including at least one predetermined error. Predetermined parity can be received at the ECC engine, where the predetermined parity is configured to correspond to the data without the at least one predetermined error. A determination can be made whether a number of errors in the data is correctable by the ECC engine using the data including the at least one predetermined error and the predetermined parity.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: Disclosed are a coating apparatus and a coating method. The coating apparatus includes a chamber, a support located in an interior space of the chamber and configured to support a substrate which is to be coated, an ejection nozzle configured to eject a coating material toward the support, and an electric field forming unit configured to form an electric field in a movement path of the coating material to provide kinetic energy for the coating material.

Abstract: A support plate for a protection module, and a battery module including the same. A support plate for a protection module of a battery module includes: a plate-shaped plate portion; and a support unit protruded or recessed from the plate portion and coupled to a protection member configured to control charging and discharging of a rechargeable battery, and the plate portion and the support unit are integrally formed.