Abstract: A support plate for a protection module, and a battery module including the same. A support plate for a protection module of a battery module includes: a plate-shaped plate portion; and a support unit protruded or recessed from the plate portion and coupled to a protection member configured to control charging and discharging of a rechargeable battery, and the plate portion and the support unit are integrally formed.

Abstract: A flat panel lighting apparatus, which makes it easy to replace a circuit board with LEDs thereon, is provided. The flat panel lighting apparatus includes a backplate, a driving unit, a light guide plate, a frame, a bracket, a circuit board, a connector and a cable connecting the driving unit and the circuit board. The frame with an opening portion is disposed at an outer periphery of the backplate and the light guide plate. The bracket is detachably coupled to the opening portion of the frame. The circuit board with light sources, is disposed in a space between the frame and the light guide plate, and is replaceable in a sliding type through the opening portion of the frame when the bracket is decoupled from the frame. The connector has a female terminal attached to the circuit board and a male terminal detachably coupled to the female terminal.

Abstract: A method of operating a semiconductor memory device can include receiving data, from a memory controller, at an Error Correction Code (ECC) engine included in the semiconductor memory device, the data including at least one predetermined error. Predetermined parity can be received at the ECC engine, where the predetermined parity is configured to correspond to the data without the at least one predetermined error. A determination can be made whether a number of errors in the data is correctable by the ECC engine using the data including the at least one predetermined error and the predetermined parity.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.

Abstract: A method of providing Point Of Interest (POI) information in an electronic device may include receiving information on an event, analyzing a text included in the information on the event and a location at which the information on the event is received, and controlling a display to display POI information based in part on a result of the analysis. According to various embodiments of the present disclosure, the method of providing the POI information in the electronic device may be implemented by the electronic device.

Abstract: A method for communicating data by an electronic device is provided. The method includes transmitting a signal including audio/video (A/V) data to a first external electronic device through a first communication module, while connected with the first external electronic device, generating data or a signal unrelated to the A/V data or receiving the data or signal unrelated to the A/V data from an external electronic device other than the first external electronic device, and providing an audio or a video through a display or an embedded sound device based on at least a portion of the data or the signal unrelated to the A/V data or transmitting the at least a portion of the data or the signal unrelated to the A/V data to a second external electronic device through a second communication module.

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: Provided are an apparatus and a method of treating a substrate using process gas. The apparatus may include a chamber configured to provide a treatment space, in which a process of treating a substrate is performed, a detection unit configured to detect an amount of reaction by-products attached on an inner surface of the chamber. The detection unit may include a window member provided on the inner surface of the chamber, and a light source member configured to emit and receive light through the window member.

Abstract: A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

Abstract: Disclosed are an apparatus and a method for cleaning a component of a substrate dry processing apparatus. The method for cleaning a component of a substrate dry processing apparatus includes dipping the component in a cleaning solution received in a cleaning bath, generating radicals from the cleaning solution, and cleaning the component with the radicals. The component is cleaned with hydrogen radicals (H2*) and hydroxyl radicals (OH*) generated from ozone water. Accordingly, it is possible to rapidly remove carbon (C) and fluorine (F) deposited on the component.

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: An adsorbent is provided to adsorb ruthenium from aqueous solution for recovery and/or reuse or removal of said ruthenium, and a method for purifying, for example, sea water and/or water containing sodium ions, magnesium ions, calcium ions, chlorine ions or other ions, polluted with a radioactive element, using said adsorbent. The ruthenium adsorbent includes manganese in the form of oxides thereof. The adsorbent can further include at least one additional transition metal element other than manganese, such as copper. The adsorbent soaked in water removes radioactive ruthenium or the like through adsorption, and thereby can purify, for example, sea water and/or water containing sodium ions, magnesium ions, calcium ions, chlorine ions or other ions.

Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

Abstract: A memory device including: an error correction code (ECC) cell array; an ECC engine configured to receive write data to be written to a memory cell array and generate internal parity bits for the write data; and an ECC select unit configured to receive the internal parity bits and external parity bits and, in response to a first level of a control signal, store the internal parity bits in the ECC cell array and, in response to a second level of the control signal store the external parity bits in the ECC cell array.

Abstract: The present invention is a vacuum evaporation heating assembly for heating a carrier, in which an evaporation material is filled, in a vacuum evaporation process, the vacuum evaporation heating assembly comprising: a carrier container in which the carrier is installed; and an electrode connector which extends in both directions of the carrier container to be connected to an electrode. At least one of the carrier container and the electrode connector is a plate-shaped member. The vacuum evaporation heating assembly can securely hold the carrier, in which the evaporation material is filled, and can vaporize the evaporation material in a specialized direction, thereby uniformly and efficiently evaporating the evaporation material with a small number of carriers.

Abstract: A flat panel lighting apparatus, which makes it easy to replace a circuit board with LEDs thereon, is provided. The flat panel lighting apparatus includes a backplate, a driving unit, a light guide plate, a frame, a bracket, a circuit board, a connector and a cable connecting the driving unit and the circuit board. The frame with an opening portion is disposed at an outer periphery of the backplate and the light guide plate. The bracket is detachably coupled to the opening portion of the frame. The circuit board with light sources, is disposed in a space between the frame and the light guide plate, and is replaceable in a sliding type through the opening portion of the frame when the bracket is decoupled from the frame. The connector has a female terminal attached to the circuit board and a male terminal detachably coupled to the female terminal.

Abstract: A semiconductor memory device includes a memory cell array including a plurality of cell cores which include a first cell core corresponding to a first channel that is a normal channel and a second cell core corresponding to a second channel that is a failed channel; and an access circuit configured to perform address remapping by converting a first address of at least a first failed cell in the first cell core into a second address of at least a second cell in the second cell core, and to transmit data of at least the second cell through the first channel.