Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

Abstract: The present invention relates to exercise equipment and, more specifically, to exercise equipment which can be utilized in a space that is not large while preventing noise between floors indoors and forms elastic waves in the waving direction of a user so that an exercise effect which is the same as that of battle ropes can be provided to the body of the user, the exercise equipment comprising: an elastic plate made from an elastic material of a predetermined length; and a weighted member provided at one end of the elastic plate, wherein waves are elastically formed in the elastic plate as the user holding a handle provided at the other end of the elastic plate waves same.

Abstract: The present invention relates to exercise equipment and, more specifically, to exercise equipment which can be utilized in a space that is not large while preventing noise between floors indoors and forms elastic waves in the waving direction of a user so that an exercise effect which is the same as that of battle ropes can be provided to the body of the user, the exercise equipment comprising: an elastic plate made from an elastic material of a predetermined length; and a weighted member provided at one end of the elastic plate, wherein waves are elastically formed in the elastic plate as the user holding a handle provided at the other end of the elastic plate waves same.

Abstract: The present disclosure relates to a nucleic acid molecule including plural translation control elements downstream inserted downstream of a coding region, and a nucleic acid expression platform or a nucleic acid expression system such as a recombinant expression vector including the nucleic acid molecule inserted therein. A target gene inserted into the coding region can be expressed efficiently using the nucleic acid molecule. It is possible to improve expression efficiency of a report gene and, an antigen and/or therapeutic protein or peptide utilizing the expression platform.

Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.

Abstract: A semiconductor device may include first and second fin-shaped patterns on a substrate, that extend in a first direction, and are spaced apart from each other in a second direction. A first epitaxial pattern may be on the first fin-shaped pattern, and a second epitaxial pattern may be on the second fin-shaped pattern. A field insulating layer may be on the substrate, and may cover a sidewall of the first fin-shaped pattern, a sidewall of the second fin-shaped pattern, a part of a sidewall of the first epitaxial pattern, and a part of a sidewall of the second epitaxial pattern. The top surface of the field insulating layer may be higher than the bottom surface of the first epitaxial pattern and the bottom surface of the second epitaxial pattern.

Abstract: A failure mode and effect analysis system according to the present invention may include: a failure severity calculation unit for calculating a failure severity by using machine learning on the basis of safety analysis information; a failure frequency calculation unit for calculating a failure frequency by using machine learning on the basis of safety analysis information; and a failure detectivity calculation unit for calculating a failure detectivity by using machine learning on the basis of safety analysis information.

Abstract: A camera module including a lens module, a carrier accommodating the lens module, a housing accommodating the carrier, and a shaking correction driver including a plurality of magnets disposed on the lens module, a plurality of coils disposed on the housing, and three or more position sensors, wherein the shaking correction driver is configured to form driving force to move the lens module on a plane perpendicular to an optical axis, wherein at least one of the plurality of magnets faces two or more position sensors, and wherein a position sensor facing one of the plurality of magnets is disposed closer to the optical axis than a position sensor facing an other of the plurality of magnets.

Abstract: The objective of the present disclosure is to provide a semiconductor package test apparatus for testing a semiconductor package by means of connecting a semiconductor package and a test board.

Abstract: Semiconductor devices and methods of forming the same are provided. The semiconductor devices may include a first fin-type pattern and a second fin-type pattern on a substrate, a first epitaxial pattern on the first fin-type pattern, a second epitaxial pattern on the second fin-type pattern, and a lower field insulating film on the substrate and extends on a sidewall of the first fin-type pattern and a sidewall of the second fin-type pattern, wherein the lower field insulating film includes a protrusion protruding in a third direction. The protrusion of the lower field insulating film may be between the first fin-type pattern and the second fin-type pattern, and a vertical level of a top surface of the protrusion of the lower field insulating film increases and then decreases with increasing distance from the sidewall of the first fin-type pattern.

Abstract: A failure mode and effect analysis system according to the present invention may include: a failure severity calculation unit for calculating a failure severity by using machine learning on the basis of safety analysis information; a failure frequency calculation unit for calculating a failure frequency by using machine learning on the basis of safety analysis information; and a failure detectivity calculation unit for calculating a failure detectivity by using machine learning on the basis of safety analysis information.

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.

Abstract: A signal transmission connector including a frame base in which a first through hole and a second through hole are alternately formed and a frame including a frame top plate having a third through hole at each position corresponding to the first through hole and covering a top surface of the frame base. A frame bottom plate having a fourth through hole at each position corresponding to the first through hole and covering a bottom surface of the frame base and a conductive part disposed on a conductive part hole including a first through hole, a third through hole, and a fourth through hole and being in the form of a plurality of conductive particles in the elastic insulating material, wherein the frame is made of an inelastic insulating material. An air layer is formed in the second through hole sealed by the frame top plate and the frame bottom plate.

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.

Abstract: A semiconductor device includes first and second active patterns each extending in a first direction and are spaced apart from each other in a second direction that is perpendicular to the first direction. A field insulating layer is disposed between the first active pattern and the second active pattern. A first gate structure is disposed on the first active pattern and extends in the second direction. An interlayer insulating layer is disposed between the first gate structure and the field insulating layer. The interlayer insulating layer includes a first part disposed below the first gate structure. A spacer is disposed between the first gate structure and the first part of the interlayer insulating layer.

Abstract: The present invention relates to a novel cocrystal, a pharmaceutical composition comprising same and a preparation method therefor. By using the cocrystal of the present invention, cancers, inflammatory diseases, or viral infection diseases may be effectively prevented and/or treated.

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.

Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.