Patents by Inventor Hyun Roh
Hyun Roh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11328949Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.Type: GrantFiled: March 26, 2020Date of Patent: May 10, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chae Ho Na, Sung Soo Kim, Gyu Hwan Ahn, Dong Hyun Roh
-
Publication number: 20220069092Abstract: A semiconductor device may include first and second fin-shaped patterns on a substrate, that extend in a first direction, and are spaced apart from each other in a second direction. A first epitaxial pattern may be on the first fin-shaped pattern, and a second epitaxial pattern may be on the second fin-shaped pattern. A field insulating layer may be on the substrate, and may cover a sidewall of the first fin-shaped pattern, a sidewall of the second fin-shaped pattern, a part of a sidewall of the first epitaxial pattern, and a part of a sidewall of the second epitaxial pattern. The top surface of the field insulating layer may be higher than the bottom surface of the first epitaxial pattern and the bottom surface of the second epitaxial pattern.Type: ApplicationFiled: March 30, 2021Publication date: March 3, 2022Inventors: Sun Ki Min, Chae Ho Na, Sang Koo Kang, Ik Soo Kim, Dong Hyun Roh
-
Patent number: 11217343Abstract: An electronic device includes a sensor, a processor, and a memory configured to store at least one instruction executed by the processor, wherein the processor is configured to collect activity information on a user related to the electronic device by using the sensor, the collecting of the activity information including creating an amount of activity of the user for a specific goal or an activity engagement level for the specific goal by using the activity information, adjust at least one of an output time point, an output cycle, the number of outputs, or the output contents of the activity guide information for the user to an activity guide parameter at least based on the amount of activity or the activity engagement level, and output the activity guide information created by using the adjusted activity guide parameter through an output device operatively connected to the processor.Type: GrantFiled: August 1, 2016Date of Patent: January 4, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: No Ah Lee, Dong Geon Kim, Kwang Yuel Ryu, Chung Ki Lee, David Rim, Min Hee Jang, Pravinsagar Prabakaran, Dong Hyun Roh, Jae Woong Chun
-
Publication number: 20210384321Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: ApplicationFiled: August 3, 2021Publication date: December 9, 2021Inventors: Dae-young KWAK, Ji -ye KIM, Jung-hwan CHUN, Min-chan GWAK, Dong-hyun ROH, Jin-wook LEE, Sang-jin HYUN
-
Publication number: 20210328039Abstract: A semiconductor device includes first and second active patterns each extending in a first direction and are spaced apart from each other in a second direction that is perpendicular to the first direction. A field insulating layer is disposed between the first active pattern and the second active pattern. A first gate structure is disposed on the first active pattern and extends in the second direction. An interlayer insulating layer is disposed between the first gate structure and the field insulating layer. The interlayer insulating layer includes a first part disposed below the first gate structure. A spacer is disposed between the first gate structure and the first part of the interlayer insulating layer.Type: ApplicationFiled: December 4, 2020Publication date: October 21, 2021Inventors: Sun Hye LEE, Sung Soo KIM, Ik Soo KIM, Woong Sik NAM, Dong Hyun ROH
-
Patent number: 11114544Abstract: An integrated circuit device includes a fin-type active region protruding from a top surface of a substrate and extending in a first direction parallel to the top surface of the substrate, a gate structure intersecting with the fin-type active region and extending on the substrate in a second direction perpendicular to the first direction, a source/drain region on a first side of the gate structure, a first contact structure on the source/drain region, and a contact capping layer on the first contact structure. A top surface of the first contact structure has a first width in the first direction, a bottom surface of the contact capping layer has a second width greater than the first width stated above in the first direction, and the contact capping layer includes a protruding portion extending outward from a sidewall of the first contact structure.Type: GrantFiled: August 27, 2019Date of Patent: September 7, 2021Inventors: Dae-young Kwak, Ji-ye Kim, Jung-hwan Chun, Min-chan Gwak, Dong-hyun Roh, Jin-wook Lee, Sang-jin Hyun
-
Patent number: 11100353Abstract: An apparatus of controlling a region of interest (ROI) in an image and a method for controlling the same are provided to determine a region of interest (ROI) in a forward-view image based on braking information and steering information of the vehicle, and obtain driving assistance information from the ROI image. The apparatus includes an image acquisition device configured to acquire a forward-view image by capturing an image about a forward region of a vehicle, a steering information acquisition device configured to acquire steering information by detecting a steering direction and a steering angle of the vehicle, a braking information acquisition device configured to acquire braking information by detecting a braking or non-braking state and a deceleration of the vehicle, and a controller configured to determine a region of interest (ROI) within the forward-view image based on at least one of the steering information or the braking information of the vehicle.Type: GrantFiled: December 30, 2019Date of Patent: August 24, 2021Assignee: MANDO CORPORATIONInventors: Seong Ho Choi, Seung Hyun Roh
-
Publication number: 20210257250Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.Type: ApplicationFiled: May 5, 2021Publication date: August 19, 2021Inventors: Sung Soo KIM, Chae Ho NA, Gyu Hwan AHN, Dong Hyun ROH, Sang Jin HYUN
-
Publication number: 20210193656Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.Type: ApplicationFiled: February 17, 2021Publication date: June 24, 2021Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
-
Patent number: 11018050Abstract: A semiconductor device includes a substrate having first fin and a second fin spaced apart and extending lengthwise in parallel. A fin remnant is disposed between the first fin and the second fin, extends lengthwise in parallel with the first and second fins, and has a height lower than a height of each of the first fin and the second fin. A first field insulation layer is disposed between a sidewall of the first fin and a first sidewall of the fin remnant and a second field insulating layer is disposed on a sidewall of the second fin. A blocking liner conforms to a sidewall and a bottom surface of a trench bounded by a second sidewall of the fin remnant and a sidewall of the second field insulating layer. A trench insulation layer is disposed on the blocking liner in the trench.Type: GrantFiled: April 17, 2019Date of Patent: May 25, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo Kim, Chae Ho Na, Gyu Hwan Ahn, Dong Hyun Roh, Sang Jin Hyun
-
Patent number: 10950602Abstract: A semiconductor device includes active fins on a substrate, a first isolation pattern on the substrate, the first isolation pattern extending on a lower sidewall of each of the active fins, a third isolation pattern including an upper portion extending into the first isolation pattern and a lower portion extending into an upper portion of the substrate, the lower portion contacting the upper portion of the third isolation pattern, and having a lower surface with a width greater than that of an upper surface thereof, and a second isolation pattern extending in the substrate under the third isolation pattern, contacting the third isolation pattern, and having a rounded lower surface.Type: GrantFiled: May 2, 2019Date of Patent: March 16, 2021Inventors: Gyu-Hwan Ahn, Sung-Soo Kim, Chae-Ho Na, Dong-Hyun Roh, Sang-Jin Hyun
-
Patent number: 10878266Abstract: A vehicle and a method for controlling the same are disclosed, which determine a region of interest (ROI) in a forward-view image based on braking information and steering information of the vehicle, and obtain driving assistance information from the ROI image. The vehicle includes an image acquisition part configured to acquire a forward-view image by capturing an image about a forward region of a vehicle, a steering information acquisition part configured to acquire steering information by detecting a steering direction and a steering angle of the vehicle, a braking information acquisition part configured to acquire braking information by detecting a braking or non-braking state and a braking deceleration of the vehicle, and a controller configured to determine a region of interest (ROI) within the forward-view image based on at least one of the steering information and the braking information of the vehicle.Type: GrantFiled: February 21, 2019Date of Patent: December 29, 2020Assignee: MANDO CORPORATIONInventors: Seong Ho Choi, Seung Hyun Roh
-
Publication number: 20200380978Abstract: An electronic device according to various embodiments may comprise a memory in which one or more applications are installed, a communication circuit, and a processor, wherein the processor is configured to acquire audio data during execution of a designated application among the one or more applications, wherein the acquiring of audio data comprises an operation of storing, in the memory, at least a portion including multiple pieces of phoneme information among the audio data, when a designated condition is satisfied, transmit the at least portion to an external electronic device so that the external electronic device generates designated information for execution of at least one application among the one or more applications by using at least a part of the multiple pieces of phoneme information stored before the designated condition is satisfied, and on the basis of the designated information, execute the at least one application in relation to the designated application.Type: ApplicationFiled: November 1, 2018Publication date: December 3, 2020Inventors: Hyun Gi AHN, Joo Yoo KIM, Ji Eun KIM, Dong Hyun ROH, Kyung Sub MIN, Seung Eun LEE
-
Patent number: 10854754Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.Type: GrantFiled: July 17, 2020Date of Patent: December 1, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo Kim, Dong Hyun Roh, Koung Min Ryu, Sang Jin Hyun
-
Publication number: 20200350429Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.Type: ApplicationFiled: July 17, 2020Publication date: November 5, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo KIM, Dong Hyun ROH, Koung Min RYU, Sang Jin HYUN
-
Publication number: 20200321241Abstract: A semiconductor device includes a substrate, a first fin, and a second fin. The first and second fins are spaced apart from each other in a first direction on the substrate and extend in a second direction intersecting the first direction. The semiconductor device further includes a first shallow trench formed between the first and second fins, and a field insulating film which fills at least a part of the first shallow trench. The field insulating film includes a first portion, a second portion adjacent to the first portion, and a third portion adjacent to the second portion and adjacent to a side wall of the first shallow trench. The first portion includes a central portion of an upper surface of the field insulating film in the first direction. The upper surface of the field insulating film is in a shape of a brace recessed toward the substrate.Type: ApplicationFiled: March 26, 2020Publication date: October 8, 2020Inventors: CHAE HO NA, SUNG SOO KIM, GYU HWAN AHN, DONG HYUN ROH
-
Patent number: 10790282Abstract: A semiconductor device may include active fins spaced apart from each other by a recess therebetween, each of the active fins protruding from an upper surface of a substrate, an isolation structure including a liner on a lower surface and a sidewall of a lower portion of the recess and a blocking pattern on the liner, the blocking pattern filling a remaining portion of the lower portion of the recess and including a nitride, a carbide or polysilicon, a gate electrode structure on the active fins and the isolation structure, and a source/drain layer on a portion of each of the active fins adjacent to the gate electrode structure.Type: GrantFiled: December 21, 2018Date of Patent: September 29, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Soo-Jung Choi, Dong-Hyun Roh, Sung-Soo Kim, Gyu-Hwan Ahn, Sang-Jin Hyun
-
Publication number: 20200281303Abstract: An insole including a base; an electronic element provided to the base; a connection line configured to extend from the electronic element and to pass through the base; and a cover provided on a top surface of the base to cover the electronic element and configured to be separable from the base.Type: ApplicationFiled: October 23, 2019Publication date: September 10, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Se-Gon Roh, Haewook Anh, Yeji Bae, Minho Choi, Chang Hyun Roh, Youngbo Shim
-
Patent number: 10727349Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.Type: GrantFiled: May 30, 2019Date of Patent: July 28, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Soo Kim, Dong Hyun Roh, Koung Min Ryu, Sang Jin Hyun
-
Patent number: 10720396Abstract: A semiconductor chip including a substrate including a plurality of chip areas and a line-shaped scribe area defining the chip areas, an integrated circuit (IC) structure on the chip area, the IC structure including a plurality of transistors and a plurality of stacked wiring structures connected to the transistors, and a warpage protector in the line-shaped scribe area and corresponding to the stacked wiring structures, the warpage protector supporting at least one side of the IC structure may be provided.Type: GrantFiled: September 10, 2018Date of Patent: July 21, 2020Assignee: Samsung Electronics Co., Ltd.Inventor: Jung-Hyun Roh