Patents by Inventor Hyun Yoo

Hyun Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250063928
    Abstract: A display panel includes a base layer including a first area including a display area and a transmission area and a second area around at least a portion of the first area and having a light transmittance lower than the first area, and first pixels, each of the first pixels including sub-pixels in the display area; and a dummy electrode in the display area. Each of the sub-pixels of the first pixel includes a pixel circuit including first transistors and a light emitting element connected to the first transistors, each of the first transistors includes a semiconductor pattern unit and a gate electrode overlapping the semiconductor pattern unit, and the dummy electrode is spaced from the semiconductor pattern unit in a plan view.
    Type: Application
    Filed: August 1, 2024
    Publication date: February 20, 2025
    Inventors: SANGYUN LIM, JEWON YOO, HYUN-JOO HWANG
  • Publication number: 20250054932
    Abstract: In a method of manufacturing a display device, the method includes: cutting a glass in cell units, forming a patterning film on a back surface of the glass, patterning the patterning film to expose a bending area of the glass, and forming a groove overlapping the bending area on the back surface of the glass by providing abrasive particles to the exposed glass.
    Type: Application
    Filed: October 25, 2024
    Publication date: February 13, 2025
    Inventors: SOUKJUNE HWANG, DONGJO KIM, HYUN KIM, SEONGGEUN WON, JEWON YOO, SEUNGMIN LEE, DANBI CHOI
  • Patent number: 12223995
    Abstract: Described apparatuses and methods relate to adaptive memory registers for a memory system that may support a nondeterministic protocol. To help manage power-delivery networks in a memory system, a device includes logic that can write values to memory registers associated with memory blocks of a memory array. The values indicate whether an associated memory block has been refreshed within a refresh interval. Other logic can read the registers to determine whether a block has been refreshed. The device also includes logic that can access data indicating a row address that was most recently, or is next to be, refreshed and write values representing the address to another register. The register can be read by other logic to determine whether a wordline potentially affected by an activation-based disturb event is near to being refreshed. These techniques can reduce the number of refresh operations performed, saving power and reducing costs.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: February 11, 2025
    Assignee: Micron Technology, Inc.
    Inventors: John Christopher Sancon, Kang-Yong Kim, Yang Lu, Hyun Yoo Lee
  • Publication number: 20250042708
    Abstract: A pop-up apparatus is provided. The pop-up apparatus includes a base unit arranged on a reference surface and having a hollow portion formed therein, a pop-up unit formed to surround the base unit and reciprocating with respect to the base unit, a connection unit arranged on an upper end of the pop-up unit, a holder unit connected to the pop-up unit by the connection unit and configured to hold an object, and a gas generation unit arranged inside the base unit and configured to generate gas, wherein internal pressure of the base unit may increase due to the gas generated from the gas generation unit and the pop-up unit may be lifted.
    Type: Application
    Filed: August 5, 2024
    Publication date: February 6, 2025
    Applicant: AGENCY FOR DEFENSE DEVELOPMENT
    Inventors: Ik Hyun BAI, Kyung Bo LEE, Jae Hun YOO
  • Publication number: 20250048799
    Abstract: A light emitting element that includes a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; an active layer disposed between the first semiconductor layer and the second semiconductor layer; a first insulating film at least partially surrounding the first semiconductor layer, the second semiconductor layer, and the active layer; a second insulating film surrounding the first insulating film; and a third insulating film surrounding the second insulating film, wherein a bond dissociation energy of the second insulating film may be less than each of a bond dissociation energy of the first insulating film and a bond dissociation energy of the third insulating film.
    Type: Application
    Filed: February 13, 2024
    Publication date: February 6, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: In Hyuk KIM, Dae Hyun KIM, Dong Kyun SEO, Young Chul SIM, Chul Jong YOO, Tae Ha JIN, Hyeong Su CHOI
  • Publication number: 20250041429
    Abstract: The present disclosure provides: a compound of a specific chemical structure, having excellent activity with respect to BTK degradation; or a pharmaceutically acceptable salt thereof. The present disclosure also provides a composition comprising the compound or pharmaceutically acceptable salts thereof. The present disclosure also provides are pharmaceutical use for treating or preventing BTK-associated diseases (for example, autoimmune diseases or cancer) of the compound, the salt thereof, and the composition comprising same according to the present disclosure. The present disclosure also provides a method for treating or preventing BTK-associated diseases (for example, autoimmune diseases or cancer), comprising administering, to a subject requiring treatment, an effective amount of the compound, the salt thereof, or the composition comprising same according to the present disclosure.
    Type: Application
    Filed: November 4, 2022
    Publication date: February 6, 2025
    Inventors: Song Hee LEE, Je Ho RYU, Jung Min AHN, Hee Jung MOON, Ho Hyun LEE, Mi Young JANG, Whee Sahng YUN, Ye Eun KIM, Sun Mi YOO, Ye Seul LIM, Na Rea JEONG, So Hyuk KIM, Ae Ran CHOI, Han Wool KIM
  • Patent number: 12218359
    Abstract: A conductive material dispersion includes a carbon-based conductive material, a main dispersant, an auxiliary dispersant, and a dispersion medium, wherein the main dispersant is a nitrile-based copolymer and the auxiliary dispersant is a copolymer including an oxyalkylene unit and at least one selected from the group consisting of a styrene unit and an alkylene unit.
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: February 4, 2025
    Assignee: LG Energy Solution, Ltd.
    Inventors: Dong Hyun Kim, Houng Sik Yoo, Seong Kyun Kang, Gye Min Kwon, Hyeon Choi
  • Patent number: 12217185
    Abstract: A knowledge increasing method includes calculating uncertainty of knowledge obtained from a neural network using an explicit memory, determining the insufficiency of the knowledge on the basis of the calculated uncertainty, obtaining additional data (learning data) for increasing insufficient knowledge, and training the neural network by using the additional data to autonomously increase knowledge.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: February 4, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun Woo Kim, Jeon Gue Park, Hwa Jeon Song, Yoo Rhee Oh, Byung Hyun Yoo, Eui Sok Chung, Ran Han
  • Publication number: 20250028237
    Abstract: A method for manufacturing a graphene thin film for a pellicle material using ozone gas includes a graphene forming step of forming graphene on an upper surface of a substrate, an ozone treatment step of exposing the graphene layer formed in the graphene forming step to ozone, and an etching step of heat-treating and etching the ozone-treated graphene layer.
    Type: Application
    Filed: October 2, 2024
    Publication date: January 23, 2025
    Inventors: Gyu Hyun LEE, Young Duck KWON, Byong Wook YOO, Seung Il MOON, Jong Taik MOON, Ki Soo KIM, Sang Min LEE
  • Publication number: 20250028482
    Abstract: A storage system includes: a first device connected to a host through an interface including a first and second switches; and a second device connected to the host through the interface. The first device includes: a first controller; a first memory; and a first shared memory including information about a first degradation of the first memory. The second device includes: a second controller; a second memory; and a second shared memory including information about a second degradation of the second memory, the second shared memory being accessible by the first controller through the first switch, and wherein the first controller is configured to: receive a command related to an operation of the first memory from the host, and control the second controller to perform the command, instead of the first controller, based on identifying that the first degradation is higher than the second degradation.
    Type: Application
    Filed: April 29, 2024
    Publication date: January 23, 2025
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soo-Young Ji, Seo-Hyun Shin, Hyun Joon Yoo, Seung Han Lee
  • Publication number: 20250029707
    Abstract: The present disclosure relates to a medical image analysis method using a processor and a memory which are hardware. The method includes generating predicted second metadata for a medical image by using a prediction model, and determining a processing method of the medical image based on one of first metadata stored corresponding to the medical image and the second metadata.
    Type: Application
    Filed: October 4, 2024
    Publication date: January 23, 2025
    Inventors: Jong Chan PARK, Dong Geun YOO, Ki Hyun YOU, Hyeon Seob NAM, Hyun Jae LEE, Sang Hyup LEE
  • Publication number: 20250029200
    Abstract: The present invention relates to a test handler for graphics chip including a loading unit performing a loading process of loading a graphics chip which is to be tested, an unloading unit performing an unloading process of unloading a tested graphics chip, a test unit testing the graphics chip which is to be tested, a buffer unit transferring a graphics chip between the loading unit and the test unit and transferring a graphics chip between the unloading unit and the test unit, wherein the test unit includes a commercial graphics card which is the same as a practically used graphics card and a contact unit connecting the commercial graphics card to the graphics chip which is to be tested.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 23, 2025
    Inventors: Kyung Tae KIM, Sung Yong Yu, Ung-Hyun Yoo, Kuk-Hyung Lee, Seok Heo, Chang Hoon Baek
  • Patent number: 12203005
    Abstract: Provided is a conductive material dispersion comprising single-walled carbon nanotubes, a dispersant, a dispersion aid, and a dispersion medium, wherein the dispersant comprises polyvinyl butyral and hydrogenated nitrile butadiene rubber, and the dispersion aid comprises a compound represented by Formula 1. A-(R)n??[Formula 1] In Formula 1, A is a structure having a carbon number of 16 to 50 carbon number and comprising four or more aromatic rings and nitrogen, R is a structure comprising an anionic functional group, and n is an integer of 1 to 5.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: January 21, 2025
    Assignee: LG Energy Solution, Ltd.
    Inventors: Hyo Sook Joo, Houng Sik Yoo, Dong Hyun Kim, Il Jae Moon, Hyeon Choi, Woo Ha Kim, Sung Soo Yoon
  • Publication number: 20250023034
    Abstract: A negative active material includes a core having a silicon-carbon composite and a polymer coating layer formed on the core, wherein the negative active material has about 1.02 to about 1.6 of a ratio of height of N1s peak occurring at about 400±about 0.5 eV relative to a height of N1s peak occurring at about 405±about 0.5 eV of a bonding energy, and about 1.02 to about 3.0 of a ratio of a height of C1s peak occurring at about 286.5±about 0.5 eV relative to a height of C1s peak occurring at about 290±about 0.5 eV when an X-ray photoelectron spectroscopy (XPS) is measured.
    Type: Application
    Filed: October 24, 2023
    Publication date: January 16, 2025
    Inventors: Hyejin KIM, Pil Jin YOO, Deok-Hyun KIM, Youngugk KIM, Jaehou NAH, Ilyoung CHOI, Eunji KANG, Sunil PARK, Jaewon KIM, Doori OH, Yookyung KIM, Narae KIM, Banseok LEE
  • Patent number: 12187672
    Abstract: Disclosed are a novel 1,2-diacylglycerol compound that useful for improving, preventing or treating inflammation-related diseases by inhibiting overexpression of various inflammatory cytokines such as IL-4 and IL-6 or chemokine CXCL8 related to the migration of inflammatory cells, a method for preparing the same, and an immunomodulator containing the same as an active ingredient. The 1,2-diacylglycerol compound is represented by Chemical Formula 2 in the patent specification.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: January 7, 2025
    Assignee: ENZYCHEM LIFESCIENCES CORPORATION
    Inventors: Ki Young Sohn, Jae Wha Kim, Sun Young Yoon, Chang Hyun Yoo, Jin Seon Jeong
  • Publication number: 20250002351
    Abstract: The present specification relates to a carbon nanotube dispersion liquid, a method for preparing same, an electrode slurry composition comprising same, an electrode comprising same, and a lithium secondary battery comprising same, the carbon nanotube dispersion liquid comprising: carbon nanotubes; a first dispersant having an amide group; and an acryl-based second dispersant having one or more functional groups selected from the group consisting of a hydroxyl group and a carboxyl group, wherein the viscosity at 25° C. and a shear rate of 15 sec?1 is 3,000 cPs or less.
    Type: Application
    Filed: October 19, 2022
    Publication date: January 2, 2025
    Inventors: Seong Kyun KANG, Jin Yeong LEE, Kwang Hyun YOO
  • Publication number: 20250004875
    Abstract: Described apparatuses and methods provide configurable error correction code (ECC) circuitry and schemes that can utilize a shared ECC engine between multiple memory banks of a memory, including a low-power double data rate (LPDDR) memory. A memory device may include one or more dies with multiple memory banks. The configurable ECC circuitry can use an ECC engine that services a memory bank by producing ECC values based on data stored in the memory bank when data-masking functionality is enabled. When data-masking functionality is disabled, the configurable ECC circuitry can use the shared ECC engine that services at least two memory banks by producing ECC values with a larger quantity of bits based on respective data stored in the at least two memory banks. By using the shared ECC engine responsive to the data-masking functionality being disabled, the ECC functionality can provide higher data reliability with lower die area utilization.
    Type: Application
    Filed: September 10, 2024
    Publication date: January 2, 2025
    Applicant: Micron Technology, Inc.
    Inventors: Keun Soo Song, Kang-Yong Kim, Hyun Yoo Lee
  • Patent number: 12180335
    Abstract: A polycarbonate diol is derived from ether diol of anhydrohexitol, a preparation method thereof, a polyurethane prepared therefrom, and adhesive, etc. including the same. More specifically, the polycarbonate diol includes repeated units derived from ether diol of anhydrohexitol; and carbonate diester; and optionally anhydrohexitol; and thereby showing better effect of improving color as compared with conventional polycarbonate diol, and being capable of providing polyurethane prepared therefrom with remarkably improved adhesion strength (T-peel strength or shear strength), preparation method thereof, polyurethane prepared therefrom, and adhesive, paint and coating agent including the same.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: December 31, 2024
    Assignee: SAMYANG CORPORATION
    Inventors: Jun Seop Im, Seung Hyun Yoo, Hoon Ryu, Won Hyun Jeon
  • Patent number: 12176061
    Abstract: Described apparatuses and methods enable communication between a host device and a memory device to establish relative delays between different data lines. If data signals propagate along a bus with the same timing, simultaneous switching output (SSO) and crosstalk can adversely impact channel timing budget parameters. An example system includes an interconnect having multiple data lines that couple the host device to the memory device. In example operations, the host device can transmit to the memory device a command indicative of a phase offset between two or more data lines of the multiple data lines. The memory device can implement the command by transmitting or receiving signals via the interconnect with different relative phase offsets between data lines. The host device (e.g., a memory controller) can determine appropriate offsets for a given apparatus. Lengths of the offsets can vary. Further, a system can activate the phase offsets based on frequency.
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: December 24, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, Timothy M. Hollis, Dong Soon Lim
  • Publication number: 20240419342
    Abstract: A memory system may include a memory device including a plurality of memory areas each configured by a plurality of memory blocks; and a memory controller configured to generate zones each including at least one memory block selected from at least one of the memory areas included in the memory device, manage configuration information for each generated zone, sequentially store data from a first storage location of an open zone among the generated zones during a write operation on the open zone according to an external request, and determine a number of active target memory areas associated with the open zone on a basis of configuration information of the open zone.
    Type: Application
    Filed: August 27, 2024
    Publication date: December 19, 2024
    Inventors: Dong Kyu LEE, Seung Geol BAEK, Jae Hyun YOO, Seon Ju LEE