Patents by Inventor Hyung-ho Ko

Hyung-ho Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8058180
    Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: November 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-Won Kwon, Hyung-Ho Ko, Chang-Sup Mun, Woo-Gwan Shim, Im-Soo Park, Yu-Kyung Kim, Jeong-Nam Han
  • Patent number: 7989123
    Abstract: A photomask includes an ion trapping layer and a method of manufacturing a semiconductor device uses the photomask. The photomask includes a transparent substrate and an ion trapping layer formed on a first region of the transparent substrate to trap ions present near the transparent substrate. In manufacturing a semiconductor device, a photosensitive film formed on a substrate is exposed through the photomask in which the ion trapping layer is formed on the transparent substrate, and the substrate is processed using the photosensitive film obtained as the result of the exposure.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-shin Lee, Jae-hyuck Choi, Hae-young Jeong, Hyung-ho Ko, Jin-sik Jung, Jong-keun Oh, Soo-jung Kang
  • Publication number: 20110023914
    Abstract: Provided is a method and apparatus for cleaning a photomask. The photomask including a first region and a second region surrounding the first region, a pattern to be protected disposed on the first region, and a material to be removed exists on the second region. A cleaning liquid is sprayed from an inside region of the second region toward an outer region of the second region to remove the material, and a gas is blown from the first region toward the second region to protect the pattern.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 3, 2011
    Inventors: Yun-song Jeong, Hyung-ho Ko, Sung-jae Han, Kyung-noh Kim, Chan-uk Jeon
  • Publication number: 20100068631
    Abstract: A photomask includes an ion trapping layer and a method of manufacturing a semiconductor device uses the photomask. The photomask includes a transparent substrate and an ion trapping layer formed on a first region of the transparent substrate to trap ions present near the transparent substrate. In manufacturing a semiconductor device, a photosensitive film formed on a substrate is exposed through the photomask in which the ion trapping layer is formed on the transparent substrate, and the substrate is processed using the photosensitive film obtained as the result of the exposure.
    Type: Application
    Filed: June 17, 2009
    Publication date: March 18, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han-shin Lee, Jae-hyuck Choi, Hae-young Jeong, Hyung-ho Ko, Jin-sik Jung, Jong-keun Oh, Soo-jung Kang
  • Publication number: 20090239158
    Abstract: A method of maintaining a mask for a semiconductor process, the method includes providing a first structure and a second structure being attached to each other via a thermosetting material, detaching the first and second structures from each other, and performing an ashing process on the first structure.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 24, 2009
    Inventors: Sang-Gyun Woo, Dong-Hun Lee, Dong-Seok Nam, Hyung-Ho Ko, Seong-Yoon Kim
  • Publication number: 20090023265
    Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+,R1—PO42—(HA+)2,(R1)2—PO4—HA+, or R1—SO3—HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.
    Type: Application
    Filed: October 1, 2008
    Publication date: January 22, 2009
    Inventors: CHANG-SUP MUN, Hyung-Ho Ko, Woo-Gwan Shim, Chang-Ki Hong, Sang-Jun Choi
  • Patent number: 7435301
    Abstract: Disclosed are a cleaning solution for preventing damage of a silicon germanium layer when cleaning a semiconductor device including the silicon germanium layer and a cleaning method using the same. The cleaning solution of a silicon germanium layer includes from about 0.01 to about 2.5 percent by weight of a non-ionic surfactant with respect to 100 percent by weight of the cleaning solution, about 0.05 to about 5.0 percent by weight of an alkaline compound with respect to the cleaning solution and a remaining amount of pure water. The damage to an exposed silicon germanium layer can be prevented when cleaning a silicon substrate having a silicon germanium layer. Impurities present on the surface portion of the silicon germanium layer can be effectively removed.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: October 14, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Sup Mun, Doo-Won Kwon, Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20080194110
    Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Doo-Won Kwon, Hyung-Ho Ko, Chang-Sup Mun, Woo-Gwan Shim, Im-Soo Park, Yu-Kyung Kim, Jeong-Nam Han
  • Patent number: 7354868
    Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-Won Kwon, Hyung-Ho Ko, Chang-Sup Mun, Woo-Gwan Shim, Im-Soo Park, Yu-Kyung Kim, Jeong-Nam Han
  • Patent number: 7318870
    Abstract: A cleaning method for a semiconductor substrate including placing the semiconductor substrate into a cleaning chamber and injecting ozone gas (O3) into the cleaning chamber. This process operates to cleanse the semiconductor substrate without corrosion or etching of the semiconductor substrate; even when the substrate has metal layer made of tungsten.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: January 15, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyun Han, Hyung-Ho Ko, Young-Jun Kim, Ki-Jong Park
  • Patent number: 7262141
    Abstract: A method for cleaning a semiconductor substrate forming device isolation layers in a predetermined region of a semiconductor substrate to define active regions; etching predetermined areas of the active regions to form a recess channel region and such that sidewalls of the device isolation layers are exposed; and selectively etching a surface of the recess channel region using a predetermined cleaning solution to clean the semiconductor substrate where the recess channel region has been formed.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: August 28, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi, Dong-Gyun Han
  • Publication number: 20070111532
    Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 17, 2007
    Inventors: Hyo-san Lee, Hyung-ho Ko, Chang-ki Hong, Sang-jun Choi
  • Patent number: 7176041
    Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: February 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-san Lee, Hyung-ho Ko, Chang-ki Hong, Sang-jun Choi
  • Publication number: 20060183297
    Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+, R1—PO42?(HA+)2, (R1)2—PO4?HA+, or R1—SO3?HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.
    Type: Application
    Filed: May 16, 2005
    Publication date: August 17, 2006
    Inventors: Chang-Sup Mun, Hyung-Ho Ko, Woo-Gwan Shim, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20060030117
    Abstract: A method for cleaning a semiconductor substrate forming device isolation layers in a predetermined region of a semiconductor substrate to define active regions; etching predetermined areas of the active regions to form a recess channel region and such that sidewalls of the device isolation layers are exposed; and selectively etching a surface of the recess channel region using a predetermined cleaning solution to clean the semiconductor substrate where the recess channel region has been formed.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 9, 2006
    Inventors: Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi, Dong-Gyun Han
  • Publication number: 20060027252
    Abstract: The present invention provides methods of processing a substrate by contacting the substrate with an inorganic solution including an organic additive, rinsing the substrate with an organic alcohol, and rinsing the substrate with deionized water. Related substrates and devices are also disclosed.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 9, 2006
    Inventors: Chang-Sup Mun, Chang-Ki Hong, Sang-Jun Choi, Hyung-Ho Ko, Sang-Yong Kim
  • Publication number: 20050260830
    Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
    Type: Application
    Filed: March 24, 2005
    Publication date: November 24, 2005
    Inventors: Doo-Won Kwon, Hyung-Ho Ko, Chang-Sup Mun, Woo-Gwan Shim, Im-Soo Park, Yu-Kyung Kim, Jeong-Nam Han
  • Publication number: 20050239672
    Abstract: Disclosed are a cleaning solution for preventing damage of a silicon germanium layer when cleaning a semiconductor device including the silicon germanium layer and a cleaning method using the same. The cleaning solution of a silicon germanium layer includes from about 0.01 to about 2.5 percent by weight of a non-ionic surfactant with respect to 100 percent by weight of the cleaning solution, about 0.05 to about 5.0 percent by weight of an alkaline compound with respect to the cleaning solution and a remaining amount of pure water. The damage to an exposed silicon germanium layer can be prevented when cleaning a silicon substrate having a silicon germanium layer. Impurities present on the surface portion of the silicon germanium layer can be effectively removed.
    Type: Application
    Filed: April 13, 2005
    Publication date: October 27, 2005
    Inventors: Chang-Sup Mun, Doo-Won Kwon, Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20050169096
    Abstract: A wet-etch composition may include: peracetic acid (PAA); and a fluorinated acid; a relative amount of the PAA in the composition being sufficient to ensure an etch rate of (P-doped-SiGe):(P-doped-Si) that is substantially the same as an etch rate of (N-doped-SiGe):(N-doped-Si). Such a wet-etch composition is hereafter referred to as a PAA-based etchant and can be used to make, e.g., a CMOS MBCFET, an electrode of a capacitor, etc.
    Type: Application
    Filed: October 29, 2004
    Publication date: August 4, 2005
    Inventors: Hyo-san Lee, Hyung-ho Ko, Chang-ki Hong, Sang-jun Choi
  • Publication number: 20050074948
    Abstract: In a method of manufacturing a shallow trench isolation (STI) structure using a HF vapor etching process according to some embodiments of the invention, a trench is formed in a semiconductor substrate. A buffer layer and a first insulating layer, which fill the trench, are formed. A portion of the first insulating layer is removed by performing an etching process using HF vapor, thereby removing a void existing in the first insulating layer. A second insulating layer filling the trench is formed on the etched first insulating layer. Other embodiments of the invention are described and claimed.
    Type: Application
    Filed: September 24, 2004
    Publication date: April 7, 2005
    Inventors: Hyung-Ho Ko, Woo-Gwan Shim, Yu-Kyung Kim, Chang-Ki Hong, Sang-Jun Choi