Abstract: A method for fabricating a capacitor of a semiconductor device includes sequentially forming an etch-stop layer and a mold layer over a substrate, sequentially forming a support layer and a hard mask pattern over the mold layer, forming a storage node hole by etching the support layer and the mold layer using the hard mask pattern as an etch barrier, forming a barrier layer on the sidewall of the mold layer inside the storage node hole, etching the etch-stop layer under the storage node hole, forming a storage node inside the storage node hole, and removing the hard mask pattern, the mold layer, and the barrier layer.

Abstract: A phase-change random access memory device includes a semiconductor substrate, a bottom electrode structure formed on the semiconductor substrate, a cylindrical bottom electrode contact that includes a conductive material layer, which is in contact with the bottom electrode, and a cylindrical phase-change material layer that is in contact with the bottom electrode contact. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.

Abstract: This patent describes an 8+2 degrees of freedom (DOF) intelligent rehabilitation robot capable of controlling the shoulder, elbow, wrist and fingers individually and allowing functional arm movements with accompanying trunk and scapular motions.

Abstract: A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.

Abstract: A semiconductor device having vertically aligned transistors made from pillar structures that have flat side surfaces is presented. The semiconductor device includes a semiconductor substrate, spacers, and gates. The semiconductor substrate has pillar structures that have flat side surfaces. The spacers are on sidewalls only on the upper portions of the pillar structures. The gates surround lower portions of the pillar structures.

Abstract: A phase-change random access memory device includes a semiconductor substrate, a bottom electrode structure formed on the semiconductor substrate, a cylindrical bottom electrode contact that includes a conductive material layer, which is in contact with the bottom electrode, and a cylindrical phase-change material layer that is in contact with the bottom electrode contact. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.

Abstract: A method for forming a pattern in a semiconductor device includes forming an etch-target layer over a substrate, wherein the substrate includes a first region having a smaller pattern than the first region, forming a sacrificial layer and a passivation layer over the etch-target layer, etching the passivation layer and the sacrificial layer to form stack structures including a sacrificial pattern and a passivation pattern, forming spacers over sidewalls of the stack structures, forming a mask pattern covering the second region, removing a portion of the passivation pattern in the first region exposed by the mask pattern to expose a portion of the sacrificial pattern in the first region, removing the exposed portion of the sacrificial pattern in the first region, and etching the etch-target layer to form an etch-target pattern using the spacers in the first and second regions and the stack structure formed between the spacers in the second region.

Abstract: A method of manufacturing a phase-change random access memory device includes forming an interlayer insulating film on a semiconductor substrate, on which a bottom structure is formed, and patterning the interlayer insulating film to form a contact hole, forming a spacer on the side wall of the contact hole; forming a dielectric layer in the contact hole, and removing the spacer to form a bottom electrode contact hole. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.

Abstract: There is provided a novel method for amplifying mass spectrometric signals. More particularly, a novel method for detecting signals of a target molecule includes: i) allowing a test sample, in which it is required to determine whether or not a target molecule is present, to be contact with a gold particle whose surface is modified to selectively bind to the target molecule, ii) allowing a low molecular molecule engrafted to the gold particle to generate mass spectrometric signals after the interaction, such as binding, between the gold particle and the target molecule, and iii) amplifying the mass spectrometric signals by generating a great deal of mass spectrometric signals of the low molecular molecule even in the presence of a trace of the target molecule. Also, the assay system using the method and the gold particle prepared in the method are provided.

Abstract: A method for manufacturing a semiconductor device having a vertical transistor includes forming hard masks on a semiconductor substrate to expose portions of the semiconductor substrate. Then the exposed portions of the semiconductor substrate are etched to define grooves in the semiconductor substrate. A gate conductive layer is formed on the hard masks and surfaces of the grooves to a thickness that does not completely fill the grooves. A sacrificial layer is formed on the gate conductive layer to completely fill the grooves. A partial thickness of the sacrificial layer is removed to expose the gate conductive layer and portions of the gate conductive layer formed on the hard masks and on sidewalls of upper portions of the grooves are removed. The remaining sacrificial layer is completely removed. Gates are formed on sidewalls of lower portions of the grooves by etching the gate conductive layer.

Abstract: A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.

Abstract: A cable driven wrist mechanism for a robot arm which executes a rolling motion and a pitching motion. The wrist mechanism includes a first drive body and a second drive body which are independently driven. The wrist mechanism includes first and second rotary bodies which are connected to the first and second rotary bodies. The wrist mechanism further includes a third drive body perpendicular to the first and second drive bodies. At least two cables are connected between the drive bodies and the rotary bodies in a criss-cross manner to transmit forces of the first and second rotary bodies to the third rotary body.

Abstract: Anterior cruciate ligament (ACL) is the most commonly injured knee ligament in sports-related activities, especially in pivoting sports. Considering that the knee is free to flex/extend but has much more limited motions about the off-axis (tibia rotation and valgus/varus), ACL injuries are often associated with excessive off-axis loadings. A pivoting/sliding mechanism combined with sagittal plane movement/exercise is described as a diagnostic tool to evaluate off-axis neuromechanical and anatomical risk factors of noncontact ACL injuries. The pivoting/sliding mechanism is also described as an intervention tool for off-axis training, possibly based on the diagnosis, to reduce the incidence of ACL injuries. Training outcome can also be evaluated using the pivoting/sliding mechanism. In general, the pivoting/sliding mechanism can be used with many sagittal plane exercise machines and used to improve off-axis control of the lower limbs and reduce lower limb injuries.

Abstract: A pocket neuromuscular evaluator delivers controlled tendon taps, makes quantitative measures of the taps and the reflex responses invoked, evaluates not only the neurological reflexes but also the muscle-joint properties, analyzes the data, displays the results, and records them to provide quantitative characterizations of the neuromuscular and joint properties.

Abstract: A semiconductor device having vertically aligned transistors made from pillar structures that have flat side surfaces is presented. The semiconductor device includes a semiconductor substrate, spacers, and gates. The semiconductor substrate has lo pillar structures that have flat side surfaces. The spacers are on sidewalls only on the upper portions of the pillar structures. The gates surround lower portions of the pillar structures.

Abstract: This patent describes an 8+2 degrees of freedom (DOF) intelligent rehabilitation robot capable of controlling the shoulder, elbow, wrist and fingers individually and allowing functional arm movements with accompanying trunk and scapular motions.

Abstract: A method for manufacturing a semiconductor device having a vertical transistor includes forming hard masks on a semiconductor substrate to expose portions of the semiconductor substrate. Then the exposed portions of the semiconductor substrate are etched to define grooves in the semiconductor substrate. A gate conductive layer is formed on the hard masks and surfaces of the grooves to a thickness that does not completely fill the grooves. A sacrificial layer is formed on the gate conductive layer to completely fill the grooves. A partial thickness of the sacrificial layer is removed to expose the gate conductive layer and portions of the gate conductive layer formed on the hard masks and on sidewalls of upper portions of the grooves are removed. The remaining sacrificial layer is completely removed. Gates are formed on sidewalls of lower portions of the grooves by etching the gate conductive layer.

Abstract: A method of manufacturing a phase-change random access memory device includes forming an interlayer insulating film on a semiconductor substrate, on which a bottom structure is formed, and patterning the interlayer insulating film to form a contact hole, forming a spacer on the side wall of the contact hole; forming a dielectric layer in the contact hole, and removing the spacer to form a bottom electrode contact hole. Therefore, the contact area between the bottom electrode contact and the phase-change material layer can be minimized.

Abstract: A slurry for polishing a ruthenium layer comprises distilled water, sodium periodate (NaIO4), an abrasive and a pH controlling agent.

Abstract: A method for forming a pattern in a semiconductor device includes forming an etch-target layer over a substrate, wherein the substrate includes a first region having a smaller pattern than the first region, forming a sacrificial layer and a passivation layer over the etch-target layer, etching the passivation layer and the sacrificial layer to form stack structures including a sacrificial pattern and a passivation pattern, forming spacers over sidewalls of the stack structures, forming a mask pattern covering the second region, removing a portion of the passivation pattern in the first region exposed by the mask pattern to expose a portion of the sacrificial pattern in the first region, removing the exposed portion of the sacrificial pattern in the first region, and etching the etch-target layer to form an etch-target pattern using the spacers in the first and second regions and the stack structure formed between the spacers in the second region.