Abstract: A semiconductor device includes active regions on a semiconductor substrate, gate structures on separate, respective active regions, and source/drain regions in the semiconductor substrate on opposite sides of separate, respective gate structures. Each separate gate structure includes a sequential stack of a high dielectric layer, a first work function metal layer, a second work function metal layer having a lower work function than the first work function metal layer, and a gate metal layer. First work function metal layers of the gate structures have different thicknesses, such that the gate structures include a largest gate structure where the first work function metal layer of the largest gate structure has a largest thickness of the first work function metal layers. The largest gate structure includes a capping layer on the high dielectric layer of the largest gate structure, where the capping layer includes one or more impurity elements.

Abstract: A method of manufacturing a semiconductor device includes forming a preliminary lower electrode layer on a substrate, the preliminary lower electrode layer including a niobium oxide; converting at least a portion of the preliminary lower electrode layer to a first lower electrode layer comprising a niobium nitride by performing a nitridation process on the preliminary lower electrode layer; forming a dielectric layer on the first lower electrode layer; and forming an upper electrode on the dielectric layer.

Abstract: A semiconductor device includes active regions on a semiconductor substrate, gate structures on separate, respective active regions, and source/drain regions in the semiconductor substrate on opposite sides of separate, respective gate structures. Each separate gate structure includes a sequential stack of a high dielectric layer, a first work function metal layer, a second work function metal layer having a lower work function than the first work function metal layer, and a gate metal layer. First work function metal layers of the gate structures have different thicknesses, such that the gate structures include a largest gate structure where the first work function metal layer of the largest gate structure has a largest thickness of the first work function metal layers. The largest gate structure includes a capping layer on the high dielectric layer of the largest gate structure, where the capping layer includes one or more impurity elements.

Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor formed in the first region and formed by a first gate line including a first lower metal-containing layer and a first upper metal-containing layer, and a second transistor formed in the second region and formed by a second gate line having an equal width to that of the first gate line and including a second lower metal-containing layer and a second upper metal-containing layer on the second upper metal-containing layer, wherein each of an uppermost end of the first upper metal-containing layer and an uppermost end of the second lower metal-containing layer has a higher level than an uppermost end of the first lower metal-containing layer.

Abstract: A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a second recess intersecting with the second active region; a gate spacer extending along sidewalls of the first and second recess; a first lower high-k dielectric film in the first recess and including a first high-k dielectric material in a first concentration and a second high-k dielectric material; a second lower high-k dielectric film in the second recess and including the first high-k dielectric material in a second concentration that is greater than the first concentration, and the second high-k dielectric material; a first metal-containing film on the first lower high-k dielectric film and including silicon in a third concentration; and a second metal-containing film on the second lower high-k dielectric film and including silicon in a fourth concentration that is smaller than the third concentration.

Abstract: A semiconductor device includes a stressor and an insulating pattern. A device isolation layer is formed to define an active area on a substrate. A first gate electrode is formed on the active area. A second gate electrode is formed on the device isolation layer. A trench is formed in the active area between the first gate electrode and the second gate electrode. A stressor is formed in the trench. A cavity formed between the stressor and the device isolation layer and adjacent to the second gate electrode is disposed. An insulating pattern is formed in the cavity.

Abstract: A method of fabricating a semiconductor device includes forming an interface layer on a substrate, forming a first gate insulating layer having a first dielectric constant on the interface layer, forming a second gate insulating layer having a second dielectric constant smaller than the first dielectric constant on the first gate insulating layer, annealing the substrate, nitriding a resultant of the annealed first and second gate insulating layers to form a nitrided gate insulator, forming a work function control layer on the nitride gate insulator, and forming a metal gate electrode on the work function control layer. At least one of the work function control layer and the metal gate electrode is of or includes aluminum (Al).

Abstract: A method of fabricating a semiconductor device includes forming an interface layer on a substrate, forming a first gate insulating layer having a first dielectric constant on the interface layer, forming a second gate insulating layer having a second dielectric constant smaller than the first dielectric constant on the first gate insulating layer, annealing the substrate, nitriding a resultant of the annealed first and second gate insulating layers to form a nitrided gate insulator, forming a work function control layer on the nitride gate insulator, and forming a metal gate electrode on the work function control layer. At least one of the work function control layer and the metal gate electrode is of or includes aluminum (Al).

Abstract: A semiconductor device includes a stressor and an insulating pattern. A device isolation layer is formed to define an active area on a substrate. A first gate electrode is formed on the active area. A second gate electrode is formed on the device isolation layer. A trench is formed in the active area between the first gate electrode and the second gate electrode. A stressor is formed in the trench. A cavity formed between the stressor and the device isolation layer and adjacent to the second gate electrode is disposed. An insulating pattern is formed in the cavity.

Abstract: A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.

Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure including a dummy gate electrode and a gate mask sequentially stacked on a substrate is formed. A spacer is formed on a sidewall of the dummy gate structure. The gate mask is formed to expose the dummy gate electrode and to form a recess on the spacer. A capping layer pattern is formed to fill the recess in the spacer. The exposed dummy gate electrode is replaced with a gate electrode.

Abstract: A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film.

Abstract: A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate.

Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.

Abstract: A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.

Abstract: A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film.

Abstract: A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate.

Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.

Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.

Abstract: Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film.