Patents by Inventor Hyunjun Kim
Hyunjun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12658248Abstract: An embedded memory device includes a plurality of first bit cells configured to store data and connected between a first bitline and a first complementary bitline, and at least one first cropping cell connected between the first bitline and the first complementary bitline. The at least one first cropping cell electrically connects a global bitline to the first bitline and electrically connects a complementary global bitline to the first complementary bitline in response to a first crop wordline signal. The global bitline and the complementary global bitline are implemented as an upper metal member, and the first bitline and the first complementary bitline are implemented as a lower metal member disposed below the upper metal member.Type: GrantFiled: December 14, 2023Date of Patent: June 16, 2026Assignees: SAMSUNG ELECTRONICS CO., LTD., UIF (University Industry Foundation), Yonsei UniversityInventors: Hyunjun Kim, Kyeongrim Baek, Seongook Jung, Sekeon Kim, Keonhee Cho
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Publication number: 20260155439Abstract: Provided are an electrolyte for a lithium metal battery and a lithium metal battery including the same. The electrolyte for the lithium metal battery includes a lithium salt; an organic solvent; and a bottlebrush polymer comprising a repeating unit represented by Chemical Formula 1, wherein the bottlebrush polymer has a bottlebrush-shaped structure in which side chains included in the repeating unit are connected to a backbone included in the repeating unit and are arranged in an outward direction, and the spacing between the side chains is evenly arranged, and a packing density of side chains defined by the value of x/(x+y) in Chemical Formula 1 is ? to 1. (In Chemical Formula 1, A1, A2, B, x, y, and t are as defined in the specification.Type: ApplicationFiled: November 10, 2025Publication date: June 4, 2026Inventors: Jiheong KANG, Hyunjun KIM
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Publication number: 20260148766Abstract: A memory device includes first and second memory cells, a first write driver configured to provide write data to the first memory cell, a second write driver configured to provide write data to the second memory cell, and a negative voltage generator configured to provide a negative voltage to the first and second write drivers. The negative voltage generator includes a first coupling capacitor configured to provide the negative voltage to the first write driver, and a second coupling capacitor configured to provide the negative voltage to the second write driver. The first and second coupling capacitors are electrically connected to one another.Type: ApplicationFiled: June 1, 2025Publication date: May 28, 2026Inventors: Hoyoung Tang, HOON KIM, Hyunjun Kim
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Patent number: 12566381Abstract: A method and apparatus for performing post-exposure bake cooling operations is described herein. The method begins by post exposure baking a substrate disposed on heated substrate support in a process chamber, the process chamber having a showerhead. The heated substrate support is moved to increase a distance between the heated substrate support and a cooled plate of the showerhead. The substrate is separated from the heated substrate support using a substrate lifting device. The substrate is moved into a close proximity to the cooled showerhead. The substrate is cooled until the substrate is less than about 70 degrees Celsius. The substrate is spaced away from the cooled showerhead using the substrate lifting device and aligning the substrate with a substrate transfer passage of the processing chamber for removal by a robot.Type: GrantFiled: October 5, 2022Date of Patent: March 3, 2026Assignee: Applied Materials, Inc.Inventors: Dmitry Lubomirsky, Douglas A. Buchberger, Jr., Hyunjun Kim, Alan L. Tso, Shekhar Athani, Qiwei Liang, Ellie Y. Yieh
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Publication number: 20260050117Abstract: A method of forming a crystalline core/crystalline clad (C4) optical fiber. The method comprises coextruding a cladding mixture of a plasticizer and a binder with a yttrium aluminum garnet (YAG) core. The coextrusion dynamically clads a polycrystalline cladding onto the YAG core to yield a green C4 optical fiber. The C4 optical fiber is then densified, preferably in two steps sintering and hot isostatic pressing. The resulting optical C4 fiber has greater power capacity than a glass fiber labor host.Type: ApplicationFiled: September 22, 2025Publication date: February 19, 2026Inventors: Hyunjun Kim, Randall Hay, Kent Averett, Cynthia Bowers, Benjamin Gray, Brian Sirn
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Publication number: 20260051461Abstract: A system includes a process chamber, a substrate support assembly to support a substrate, and a shower head assembly. The shower head assembly includes a gas distribution plate including an inner region having a first radius and a first thickness and an outer region, that is concentric with the inner region, having a f second radius that is greater than the first radius. The outer region further having a second thickness that is less than the first thickness causing the inner region to have a first distance from the substrate and the outer region to have a second distance from the substrate. The first distance is less than the second distance. The gas distribution plate is configured to deposit a coating on an outer region of the substrate without depositing the coating on an inner region of the substrate.Type: ApplicationFiled: August 14, 2024Publication date: February 19, 2026Inventors: Dmitry Lubomirsky, Pranav Vijay Gadre, Hyun Joo Lee, Douglas Arthur Buchberger, JR., Adib Mahmood Newaz Khan, Qiwei Liang, Hyunjun Kim, Shekhar Athani, Srinivas Durgaprasad Nemani, Ellie Yi-Li Yieh
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Patent number: 12530051Abstract: A display device includes a display panel, which includes a folding region, which is foldable around a folding axis extending in a first direction, and first and second non-folding regions spaced apart from each other with the folding region therebetween, and a lower member disposed below the display panel. The lower member includes a first high-rigidity part, a first low-rigidity part, a second high-rigidity part, a second low-rigidity part, and a third high-rigidity part, each of which overlaps the folding region and which are arranged in a second direction crossing the first direction. Each of the first and second low-rigidity parts has a modulus less than a modulus of a high-rigidity part adjacent thereto in the second direction among the first high-rigidity part, the second high-rigidity part and the third high-rigidity part.Type: GrantFiled: October 1, 2023Date of Patent: January 20, 2026Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hyoyul Yoon, Eunhye Kang, Kyoungah Lee, Mingu Kim, Hyunjun Kim, Yu Deok Seo
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Patent number: 12532447Abstract: A method of fabricating a capacitor includes forming a lower electrode on a semiconductor substrate in a reaction space. A homogeneous oxide layer is formed on the lower electrode. A dielectric layer is formed on the homogeneous oxide layer. An upper electrode is formed on the dielectric layer. The forming of the homogeneous oxide layer includes performing a homogeneous oxide layer forming cycle at least one time. The homogeneous oxide layer forming cycle includes supplying an oxidizing agent, purging the oxidizing agent, and pumping-out the reaction space.Type: GrantFiled: September 28, 2022Date of Patent: January 20, 2026Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Cheoljin Cho, Hyunjun Kim, Yukyung Shin, Jongbeom Seo, Changhwa Jung
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Patent number: 12477759Abstract: A semiconductor device includes a substrate, lower electrodes on the substrate, a dielectric layer covering the lower electrodes, and an upper electrode covering the dielectric layer. The dielectric layer includes a first region in contact with the lower electrodes, a second region in contact with the upper electrode, and a third region between the first and second regions. The third region includes a first insertion layer including a first oxide including a first metal having a first valence and a second oxide including a second metal having a second valence different from the first valence. A thickness of the dielectric layer is about 40 ? to about 60 ?. A thickness of the first insertion layer is about 3 ? to about 10 ?. A ratio of the second metal to total elements in the dielectric layer is about 5 at % to about 15 at %.Type: GrantFiled: December 30, 2022Date of Patent: November 18, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunjun Kim, Hayeon Kim, CheolJin Cho
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Patent number: 12444458Abstract: A memory cell array of an SRAM including: a top memory cell array including top memory cells; and a bottom memory cell array including bottom memory cells, the top memory cells include: a first top memory cell between a power supply voltage and a middle node, and connected to a first top wordline, a first top bitline and a first top complementary bitline, the bottom memory cells include: a first bottom memory cell to operate with the first top memory cell, connected between the middle node and a ground voltage, and connected to a first bottom wordline, a first bottom bitline and a first bottom complementary bitline, and when write and read operations are not performed on the first top and bottom memory cells, the first top bitline, the first top complementary bitline, the first bottom bitline and the first bottom complementary bitline are connected to the middle node.Type: GrantFiled: July 28, 2023Date of Patent: October 14, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunjun Kim, Sekeon Kim, Seongook Jung, Kyeongrim Baek, Keonhee Cho
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Patent number: 12425238Abstract: Systems and methods include reception of a request to move a first database tenant from a first database instance to a second database instance, the first database tenant comprising a first tenant object instance associated with a plurality of artifacts of the first database instance, the plurality of artifacts including a tenant-level catalog and data. In response to the request, the tenant-level catalog is exported from the first database instance to a shared storage system, the tenant-level catalog is imported to a second tenant of the second database instance from the shared storage system, the data is exported from the first database instance to the shared storage system, the data is imported to the second tenant of the second database instance from the shared storage system, and the first database tenant is dropped from the first database instance.Type: GrantFiled: April 19, 2023Date of Patent: September 23, 2025Assignee: SAP SEInventors: Hyunjun Kim, Eunsang Kim, Jian Luo, Patrick Voelker, Jaeyoung Choi, Yong Sik Kwon, Mihnea Andrei
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Publication number: 20250284976Abstract: Provided is an electronic device including a communication interface, a memory for storing a plurality of neural network models and a plurality of profile information corresponding to the plurality of neural network models, and a plurality of processors. Each profile information of a plurality of profile information includes information on a neural network model for performing a task corresponding to each task request and resource information of the electronic device that is required for each processor of the plurality of processors to perform the task using the neural network model.Type: ApplicationFiled: May 23, 2025Publication date: September 11, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungho LEE, Joonwoo KIM, Hyunjun KIM, Venkatraman Ganeshan IYER, Hyunjin YI
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Publication number: 20250243123Abstract: A process for creating polycrystalline silicon nitride fibers includes dispersing silicon nitride (Si3N4) powder to create dispersed silicon nitride powder. The dispersed silicon nitride powder is then classified to create classified fine silicon nitride powder. Likewise, a sintering aid is dispersed to create a dispersed sintering aid and then classified to create a classified sintering aid. A plasticizer, a binder, and the classified sintering aid are added to the classified fine silicon nitride powder to define a compound. The compound is mixed to create a mixed slurry, which is then dried to create a material.Type: ApplicationFiled: January 28, 2025Publication date: July 31, 2025Inventors: Hyunjun Kim, Michael K. Cinibulk, Randall S. Hay, Lisa M. Rueschhoff, Connor Wyckoff, Kristan A. Keller
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Publication number: 20250243122Abstract: A method for creating polycrystalline silicon nitride fibers is discussed. The method includes dispersing silicon nitride powder to create dispersed silicon nitride powder. The dispersed silicon nitride powder is classified to create classified fine silicon nitride powder. Likewise, a sintering aid is dispersed to create a dispersed sintering aid and then classified to create a classified sintering aid. A plasticizer, a binder, and the classified sintering aid are added to the classified fine silicon nitride powder to define a compound. The compound is mixed to create a mixed slurry, which is then dried to create a material. The material is extruded through a nozzle that is less than 40 micrometers in diameter to create a preform, which is then sintered to create the polycrystalline silicon nitride fibers.Type: ApplicationFiled: January 28, 2025Publication date: July 31, 2025Inventors: Hyunjun Kim, Kristin A. Keller
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Patent number: 12367920Abstract: An SRAM cell includes a first pass gate transistor connected with a first word-line and a local bit-line, a first inverter that includes an output terminal connected with the first pass gate transistor and an input terminal, a second inverter that includes an input terminal connected with the first pass gate transistor and an output terminal, a second pass gate transistor connected with a second word line, the input terminal of the first inverter and the output terminal of the second inverter, and a complementary local bit-line, a first transistor connected with the second pass gate transistor, a local computing line, and a ground electrode, and a second transistor connected with a third word-line, the local computing line, and the ground electrode.Type: GrantFiled: March 8, 2023Date of Patent: July 22, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jongsun Park, Kyeongho Lee, Hyunjun Kim
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Patent number: 12333040Abstract: Systems and methods include creation of a first instance of a tenant object in a database instance, association of the first instance of the tenant object with a first plurality of database artifacts including first data associated with the first instance of the tenant object, creation of a second instance of the tenant object in the database instance, association of the second instance of the tenant object with a second plurality of database artifacts including second data associated with the second instance of the tenant object, and reception and response to queries on the first data associated with the first instance of the tenant object and to queries on the second data associated with the second instance of the tenant object.Type: GrantFiled: August 22, 2022Date of Patent: June 17, 2025Assignee: SAP SEInventors: Mihnea Andrei, Alexander Boehm, Norman May, Urs Klingsporn, Meinolf Block, Patrick Voelker, Hyunjun Kim, Thorsten Glebe, Jonathan Bregler, Jaeyoung Choi, Martin Kittel, Yong Sik Kwon, Uwe Hahn, Henning Zahn, Melanie Handreck, Holger Mack, Eunsang Kim, Frank Renkes, Juchang Lee, Martin Schindewolf, Ivan Bowman, Lars Dannecker
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Publication number: 20250163607Abstract: Disclosed herein is a processing chamber for a low temperature epitaxy deposition and components of the same. The processing chamber includes a dome lid coupled with a lid liner via a lid liner separator; a remote plasma source disposed outside the dome lid and operable to energize a process gas; a gas ring disposed under the dome lid and coupled with a gas ring liner via a gas ring liner separator; a showerhead disposed under the gas ring; a susceptor disposed below the showerhead and operable to heat a substrate by conduction; and a side wall disposed under the gas ring and coupled with a wall liner via a wall liner separator. The cleaning method of the processing chamber is also disclosed.Type: ApplicationFiled: November 21, 2023Publication date: May 22, 2025Inventors: Justin GAU, Shekhar ATHANI, Rahul KOZHIKKALKANDI, Nithin ALEX, Adib KHAN, Qiwei LIANG, Lancelot HUANG, Junghoon KIM, Hyunjun KIM, Douglas A. BUCHBERGER, JR., Vishwas Kumar PANDEY, Srinivas D. NEMANI, Ellie Y. YIEH, Dmitry LUBOMIRSKY
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Publication number: 20250147119Abstract: The present disclosure provides a retention circuit diagnostic system. The retention circuit diagnostic system includes a first retention circuit configured to output a retention signal for controlling a contactor, and a controller configured to transmit a first signal related to a state control of the contactor, and to transmit a second signal for activating the first retention circuit, and configured to diagnose the first retention circuit based on the retention signal.Type: ApplicationFiled: March 28, 2024Publication date: May 8, 2025Inventor: Hyunjun KIM
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Patent number: 12242359Abstract: Systems and methods include reception of an instruction to recover a first database tenant of a first database instance to a first point in time, the first database tenant associated with first database artifacts of the first database instance, and the first database instance including two or more database tenants and, in response to the instruction, creation of a second database instance, selection of backup data of the first database instance based on the first point in time, execution of a recovery of the backup data on the second database instance, export of second database artifacts of the first database tenant from the second database instance to a storage, truncation of the first database artifacts from the first database instance, import of the second database artifacts from the storage to the first database instance, and deletion of the second database instance.Type: GrantFiled: March 17, 2023Date of Patent: March 4, 2025Assignee: SAP SEInventors: Uwe Hahn, Eunsang Kim, Mihnea Andrei, Werner Thesing, Patrick Voelker, Ruediger Karl, Yong Sik Kwon, Jaeyoung Choi, Jian Luo, Hyunjun Kim, Andre Schefe, Urs Klingsporn, Norman May
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Publication number: 20250070803Abstract: An electronic device includes a housing including at least one conductive portion disposed along at least a portion of a side surface of the housing, the at least one conductive portion configured to receive or to transmit a signal, a first module inside the housing and adjacent to the at least one conductive portion, and a first printed circuit board inside the housing and comprising a communication line electrically connected to the first module, wherein the communication line extends along an edge of the first printed circuit board to have a resonance frequency different from a frequency of the signal received or transmitted by the at least one conductive portion.Type: ApplicationFiled: August 23, 2024Publication date: February 27, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Janghoon HAN, Gilyong KU, Hyunjun KIM, Seongyong PARK, Seunghee SON, Jiyeong YU, Jungeun LEE