Abstract: A hinge device of a portable terminal with a foldable structure according to the present invention includes: housing positioned between one end of a first body and one end of a second body; first hinge blade and second hinge blade fixed to the first body and the second body, respectively, and supported against the housing to rotate at a predetermined angle between an ‘unfolded position’ in which the first body and the second body are placed on the same horizontal line and a ‘folded position’ in which the first body and the second body face each other and thus come into contact with each other; and first interlocking gear and second interlocking gear for interlocking the first hinge blade and the second hinge blade with each other so that the first hinge blade and the second hinge blade move relative to each other, wherein the first interlocking gear and the second interlocking gear are mounted on the corresponding housing in such a way as to rotate relative to each other by a predetermined angle around gear s

Abstract: A hinge device for a portable terminal having a foldable structure according to the present invention comprises: a housing positioned between one end of a first body and one end a second body; a first hinge blade and a second hinge blade which are fixed to the first body and the second body, respectively, and are rotatably supported by the housing, so as to rotate at a predetermined angle between an ‘unfolded position’ in which the first body and the second body are placed on the same horizontal line and a ‘folded position’ in which the first body and the second body face each other and come into contact with each other; and a slide member that interlocks the first hinge blade and the second hinge blade such that the first hinge blade and the second hinge blade move relative to each other, wherein the first hinge blade and the second hinge blade have first inclined guide groove and second inclined guide groove formed on the undersides thereof, and correspondingly thereto, the slide member has first inclined g

Abstract: A hinge device of a portable terminal with a foldable structure according to the present invention is characterized by comprising: housing positioned between one end of a first body and one end of a second body; first hinge blade and second hinge blade fixed to the first body and the second body, respectively, and supported by the housing to rotate at a predetermined angle between an ‘unfolded position’ in which the first body and the second body are placed on the same horizontal line and a ‘folded position’ in which the first body and the second body face each other and come into contact with each other; and link lever for interlocking the first hinge blade and the second hinge blade with each other so that the first hinge blade and the second hinge blade move relative to each other, wherein the first hinge blade and the second hinge blade have first inclined link groove and second inclined link groove formed on the undersides thereof, and correspondingly thereto, the link lever has first link protrusion and

Abstract: Magnetic junction memory devices and methods for writing data to memory devices are provided. The magnetic junction memory device includes a first memory bank including first magnetic junction memory cells, a first local write driver adjacent to the first memory bank, connected to global data lines, the first local write driver configured to write data to the first magnetic junction memory cells via local data lines, a second memory bank adjacent to the first memory bank and including second magnetic junction memory cells, a second local write driver adjacent to the second memory bank, connected to the global data lines, the second local write driver configured to write data to the second magnetic junction memory cells via local data lines, and a global write driver configured to provide first and second write data to the first and second local write driver, respectively, via the global data lines.

Abstract: Magnetic junction memory devices and methods for writing data to memory devices are provided. The magnetic junction memory device includes a first memory bank including first magnetic junction memory cells, a first local write driver adjacent to the first memory bank, connected to global data lines, the first local write driver configured to write data to the first magnetic junction memory cells via local data lines, a second memory bank adjacent to the first memory bank and including second magnetic junction memory cells, a second local write driver adjacent to the second memory bank, connected to the global data lines, the second local write driver configured to write data to the second magnetic junction memory cells via local data lines, and a global write driver configured to provide first and second write data to the first and second local write driver, respectively, via the global data lines.

Abstract: A nonvolatile memory device includes a memory cell comprising a first variable resistor having one end connected to a first node, and the other end connected to a second node through a cell transistor; and a reference cell comprising a second variable resistor having one end connected to a third node, and the other end connected to a fourth node through a reference cell transistor, wherein gates of the cell transistor and the reference cell transistor are connected to a word line. Directions of a first read current flowing in the memory cell and a direction of a second read current flowing in the reference cell are opposite to each other.

Abstract: Magnetic junction memory devices and methods for writing data to memory devices are provided. The magnetic junction memory device includes a first memory bank including first magnetic junction memory cells, a first local write driver adjacent to the first memory bank, connected to global data lines, the first local write driver configured to write data to the first magnetic junction memory cells via local data lines, a second memory bank adjacent to the first memory bank and including second magnetic junction memory cells, a second local write driver adjacent to the second memory bank, connected to the global data lines, the second local write driver configured to write data to the second magnetic junction memory cells via local data lines, and a global write driver configured to provide first and second write data to the first and second local write driver, respectively, via the global data lines.

Abstract: A resistive memory device configured to calibrate a reference resistor includes a calibration resistor circuit including a calibration resistor, a first reference resistor, a first sense amplifier configured to compare input currents, a first switch set including a plurality of switches, and a controller configured to control the first switch set to allow the first sense amplifier to compare a first reference current passing through the first reference resistor with a first read current passing through a first memory cell during a read operation and compare the first reference current with a first calibration current passing through the calibration resistor during a calibrate operation. A path of the first reference current during the read operation is different from a path of the first reference current during the calibrate operation.

Abstract: A device for supporting a test mode for memory testing according to an example embodiment of the inventive concepts may include a memory configured to receive and store writing data and output reading data from the stored writing data; an error correction code (ECC) engine configured to generate the writing data by encoding input data and to generate output data by correcting error bits of N bits or less included in receiving data when N is a positive integer; and an error insertion circuit configured to provide the reading data to the ECC engine as the receiving data in a normal mode and to provide data obtained by inverting at least one bit of less than N bits of the reading data to the ECC engine as the receiving data in the test mode.

Abstract: A nonvolatile memory device may comprise a memory cell comprising a first variable resistor having one end connected to a first node, and the other end connected to a second node through a cell transistor; and a reference cell comprising a second variable resistor having one end connected to a third node, and the other end connected to a fourth node through a reference cell transistor, wherein gates of the cell transistor and the reference cell transistor are connected to a word line. Directions of a first read current flowing in the memory cell and a direction of a second read current flowing in the reference cell are opposite to each other.

Abstract: Provided is a control signal generator for a sense amplifier, the control signal generator including a replica circuit including replica transistors corresponding to transistors included in the sense amplifier, and configured to receive at least one input signal of the sense amplifier and a first control signal for enabling a sensing operation by the sense amplifier; and an amplifying circuit configured to output, by amplifying an output signal from the replica circuit, a second control signal for enabling an amplifying operation by the sense amplifier after the sensing operation is enabled.

Abstract: A method of controlling a reference cell in a resistive memory to identify values stored in a plurality of memory cells is provided. The method includes writing a first value to the plurality of memory cells, providing, to the reference cell, monotonically increasing or monotonically decreasing reference currents. The method includes reading the plurality of memory cells as each of the reference currents is provided to the reference cell, and determining a read reference current based on an aggregation of results of the reading.

Abstract: A resistive memory device includes: a voltage generator generating a write word line voltage according to activation of a write enable signal; a switch circuit outputting one of the write word line voltage and a read word line voltage in response to the write enable signal as an output voltage; a word line power path connected to the switch circuit to receive the output voltage; and a word line driver driving a word line according to a voltage applied to the word line power path, wherein a write command starts to be received after a certain delay following the activation of the write enable signal, and a write operation is performed within an activation period of the write enable signal in response to the received write command.

Abstract: A resistive memory device configured to calibrate a reference resistor includes a calibration resistor circuit including a calibration resistor, a first reference resistor, a first sense amplifier configured to compare input currents, a first switch set including a plurality of switches, and a controller configured to control the first switch set to allow the first sense amplifier to compare a first reference current passing through the first reference resistor with a first read current passing through a first memory cell during a read operation and compare the first reference current with a first calibration current passing through the calibration resistor during a calibrate operation. A path of the first reference current during the read operation is different from a path of the first reference current during the calibrate operation.

Abstract: A resistive memory device includes: a voltage generator generating a write word line voltage according to activation of a write enable signal; a switch circuit outputting one of the write word line voltage and a read word line voltage in response to the write enable signal as an output voltage; a word line power path connected to the switch circuit to receive the output voltage; and a word line driver driving a word line according to a voltage applied to the word line power path, wherein a write command starts to be received after a certain delay following the activation of the write enable signal, and a write operation is performed within an activation period of the write enable signal in response to the received write command.

Abstract: Provided is a control signal generator for a sense amplifier, the control signal generator including a replica circuit including replica transistors corresponding to transistors included in the sense amplifier, and configured to receive at least one input signal of the sense amplifier and a first control signal for enabling a sensing operation by the sense amplifier; and an amplifying circuit configured to output, by amplifying an output signal from the replica circuit, a second control signal for enabling an amplifying operation by the sense amplifier after the sensing operation is enabled.

Abstract: A resistive memory device includes: a voltage generator generating a write word line voltage according to activation of a write enable signal; a switch circuit outputting one of the write word line voltage and a read word line voltage in response to the write enable signal as an output voltage; a word line power path connected to the switch circuit to receive the output voltage; and a word line driver driving a word line according to a voltage applied to the word line power path, wherein a write command starts to be received after a certain delay following the activation of the write enable signal, and a write operation is performed within an activation period of the write enable signal in response to the received write command.

Abstract: A device for supporting a test mode for memory testing according to an example embodiment of the inventive concepts may include a memory configured to receive and store writing data and output reading data from the stored writing data; an error correction code (ECC) engine configured to generate the writing data by encoding input data and to generate output data by correcting error bits of N bits or less included in receiving data when N is a positive integer; and an error insertion circuit configured to provide the reading data to the ECC engine as the receiving data in a normal mode and to provide data obtained by inverting at least one bit of less than N bits of the reading data to the ECC engine as the receiving data in the test mode.

Abstract: A method of controlling a reference cell in a resistive memory to identify values stored in a plurality of memory cells is provided. The method includes writing a first value to the plurality of memory cells, providing, to the reference cell, monotonically increasing or monotonically decreasing reference currents. The method includes reading the plurality of memory cells as each of the reference currents is provided to the reference cell, and determining a read reference current based on an aggregation of results of the reading.

Abstract: A resistive memory device includes: a voltage generator generating a write word line voltage according to activation of a write enable signal; a switch circuit outputting one of the write word line voltage and a read word line voltage in response to the write enable signal as an output voltage; a word line power path connected to the switch circuit to receive the output voltage; and a word line driver driving a word line according to a voltage applied to the word line power path, wherein a write command starts to be received after a certain delay following the activation of the write enable signal, and a write operation is performed within an activation period of the write enable signal in response to the received write command.