Patents by Inventor I-Ming Tseng

I-Ming Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180331177
    Abstract: A method of forming a semiconductor structure is disclosed. A fin structure is formed on a substrate and a trench is formed in the fin structure. The trench has a top corner, an upper portion having an upper sidewall and a lower portion having a lower sidewall. A first dielectric layer is then formed on the substrate and fills the lower portion of the trench. After that, a second dielectric layer is formed on the substrate and covers the top corner and the upper sidewall of the trench. The second dielectric layer also covers an upper surface of the first dielectric layer.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 15, 2018
    Inventors: I-Ming Tseng, Chun-Hsien Lin, Wen-An Liang
  • Patent number: 10090398
    Abstract: A method of fabricating a patterned structure of a semiconductor device includes the following steps: providing a substrate having a target layer thereon; forming a patterned sacrificial layer on the target layer, wherein the patterned sacrificial layer consists of a plurality of sacrificial features; forming spacers respectively on sidewalls of each of the sacrificial features, wherein all of the spacers are arranged to have a layout pattern; and transferring the layout pattern to the target layer so as to form a first feature and a second feature, wherein the first feature comprises a vertical segment and a horizontal segment, the second feature comprises a vertical segment and a horizontal segment, and a distance between the vertical segment of the first feature and the vertical segment of the second feature is less than a minimum feature size generated by an exposure apparatus.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: October 2, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Rai-Min Huang, I-Ming Tseng, Tong-Jyun Huang, Kuan-Hsien Li
  • Patent number: 10043868
    Abstract: A semiconductor structure and method of forming the same. The semiconductor structure includes a fin structure formed on a substrate and an isolation structure formed therein. The isolation structure includes a trench with a concave upper sidewall, a straight lower sidewall and a rounded top corner. A first dielectric layer fills a lower portion of the trench. A second dielectric layer covers a top surface of the first dielectric layer, the concave upper sidewall and the rounded top corner of the trench.
    Type: Grant
    Filed: August 28, 2016
    Date of Patent: August 7, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Chun-Hsien Lin, Wen-An Liang
  • Patent number: 10032675
    Abstract: The present invention further provides a method for forming a semiconductor device, comprising: first, a substrate having a fin structure disposed thereon is provided, wherein the fin structure has a trench, next, a first liner in the trench is formed, a first insulating layer is formed on the first liner, afterwards, a shallow trench isolation is formed in the substrate and surrounding the fin structure, wherein a bottom surface of the shallow trench isolation is higher than a bottom surface of the first insulating layer, and a top surface of the shallow trench isolation is lower than a top surface of the first insulating layer, and a dummy gate structure is formed on the first insulating layer and disposed above the trench, wherein a bottom surface of the dummy gate structure and a top surface of the fin structure are on a same level.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: July 24, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20180103757
    Abstract: A slide rail assembly includes a first rail, a second rail, and a reinforcing structure. The first rail includes a front end portion and a rear end portion. The second rail is displaceable with respect to the first rail. The reinforcing structure is located at the second rail. A portion of the reinforcing structure protrudes beyond the front end portion of the first rail when the second rail is displaced from a first position to a second position with respect to the first rail.
    Type: Application
    Filed: June 6, 2017
    Publication date: April 19, 2018
    Inventors: KEN-CHING CHEN, SHUN-HO YANG, I-MING TSENG, CHUN-CHIANG WANG
  • Publication number: 20180040694
    Abstract: A semiconductor structure and method of forming the same. The semiconductor structure includes a fin structure formed on a substrate and an isolation structure formed therein. The isolation structure includes a trench with a concave upper sidewall, a straight lower sidewall and a rounded top corner. A first dielectric layer fills a lower portion of the trench.
    Type: Application
    Filed: August 28, 2016
    Publication date: February 8, 2018
    Inventors: I-Ming Tseng, Chun-Hsien Lin, Wen-An Liang
  • Patent number: 9859147
    Abstract: A fin structure cutting process includes the following steps. Four fin structures are formed in a substrate, where the four fin structures including a first fin structure, a second fin structure, a third fin structure and a fourth fin structure are arranged sequentially and parallel to each other. A first fin structure cutting process is performed to remove top parts of the second fin structure and the third fin structure, thereby a first bump being formed from the second fin structure, and a second bump being formed from the third fin structure. A second fin structure cutting process is performed to remove the second bump and the fourth fin structure completely, but to preserve the first bump beside the first fin structure. Moreover, the present invention provides a fin structure formed by said process.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: January 2, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tong-Jyun Huang, Rai-Min Huang, I-Ming Tseng, Kuan-Hsien Li, Chen-Ming Huang
  • Patent number: 9824931
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a first shallow trench isolation (STI) around the fin-shaped structure; dividing the fin-shaped structure into a first portion and a second portion; and forming a second STI between the first portion and the second portion.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: November 21, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170309727
    Abstract: A method of fabricating a patterned structure of a semiconductor device includes the following steps: providing a substrate having a target layer thereon; forming a patterned sacrificial layer on the target layer, wherein the patterned sacrificial layer consists of a plurality of sacrificial features; forming spacers respectively on sidewalls of each of the sacrificial features, wherein all of the spacers are arranged to have a layout pattern; and transferring the layout pattern to the target layer so as to form a first feature and a second feature, wherein the first feature comprises a vertical segment and a horizontal segment, the second feature comprises a vertical segment and a horizontal segment, and a distance between the vertical segment of the first feature and the vertical segment of the second feature is less than a minimum feature size generated by an exposure apparatus.
    Type: Application
    Filed: July 12, 2017
    Publication date: October 26, 2017
    Inventors: Rai-Min Huang, I-Ming Tseng, Tong-Jyun Huang, Kuan-Hsien Li
  • Patent number: 9786502
    Abstract: A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the substrate simultaneously. A plurality of spacers are respectively formed on sidewalls of the first mandrel and the second mandrels and followed by removing the first mandrel and the second mandrels to form a first spacer pattern and a plurality of second spacer patterns. Then the substrate is etched to simultaneously form at least a first fin and a plurality of second fins on the substrate with the first spacer pattern and the second spacer patterns serving as an etching mask. At least one of the second fins is immediately next to the first fin, and a fin width of the first fin is larger than a fin width of the second fins. Then, the second fins are removed from the substrate.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: October 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuan-Hsien Li, Rai-Min Huang, I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170263454
    Abstract: A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the substrate simultaneously. A plurality of spacers are respectively formed on sidewalls of the first mandrel and the second mandrels and followed by removing the first mandrel and the second mandrels to form a first spacer pattern and a plurality of second spacer patterns. Then the substrate is etched to simultaneously form at least a first fin and a plurality of second fins on the substrate with the first spacer pattern and the second spacer patterns serving as an etching mask. At least one of the second fins is immediately next to the first fin, and a fin width of the first fin is larger than a fin width of the second fins. Then, the second fins are removed from the substrate.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 14, 2017
    Inventors: Kuan-Hsien Li, Rai-Min Huang, I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9755048
    Abstract: A patterned structure of a semiconductor device includes a substrate, a first feature and a second feature. The first feature and the second feature are disposed on the substrate, and either of which includes a vertical segment and a horizontal segment. There is a distance between the vertical segment of the first feature and the vertical segment of the second feature, and the distance is less than the minimum exposure limits of an exposure apparatus.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: September 5, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Rai-Min Huang, I-Ming Tseng, Tong-Jyun Huang, Kuan-Hsien Li
  • Publication number: 20170207129
    Abstract: The present invention further provides a method for forming a semiconductor device, comprising: first, a substrate having a fin structure disposed thereon is provided, wherein the fin structure has a trench, next, a first liner in the trench is formed, a first insulating layer is formed on the first liner, afterwards, a shallow trench isolation is formed in the substrate and surrounding the fin structure, wherein a bottom surface of the shallow trench isolation is higher than a bottom surface of the first insulating layer, and a top surface of the shallow trench isolation is lower than a top surface of the first insulating layer, and a dummy gate structure is formed on the first insulating layer and disposed above the trench, wherein a bottom surface of the dummy gate structure and a top surface of the fin structure are on a same level.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170154823
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a first shallow trench isolation (STI) around the fin-shaped structure; dividing the fin-shaped structure into a first portion and a second portion; and forming a second STI between the first portion and the second portion.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 1, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9653402
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: May 16, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170092643
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9608062
    Abstract: The present invention provides a semiconductor structure including a fin structure formed on a substrate, and an isolation structure formed in the fin structure. The isolation structure includes a trench, and a first dielectric layer disposed in the trench wherein the first dielectric layer includes a body portion in the bottom, a protruding portion in the top with a top surface, and a shoulder portion connecting the body portion and the protruding portion. The protruding portion has a smaller width than the body portion. The semiconductor structure further includes a second dielectric layer covering a top corner of the trench and sandwiched between the protruding portion, the shoulder portion of the first dielectric layer and the upper sidewall of the trench.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: March 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9607985
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170047244
    Abstract: A fin structure cutting process includes the following steps. Four fin structures are formed in a substrate, where the four fin structures including a first fin structure, a second fin structure, a third fin structure and a fourth fin structure are arranged sequentially and parallel to each other. A first fin structure cutting process is performed to remove top parts of the second fin structure and the third fin structure, thereby a first bump being formed from the second fin structure, and a second bump being formed from the third fin structure. A second fin structure cutting process is performed to remove the second bump and the fourth fin structure completely, but to preserve the first bump beside the first fin structure. Moreover, the present invention provides a fin structure formed by said process.
    Type: Application
    Filed: October 28, 2016
    Publication date: February 16, 2017
    Inventors: Tong-Jyun Huang, Rai-Min Huang, I-Ming Tseng, Kuan-Hsien Li, Chen-Ming Huang
  • Publication number: 20170012000
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.
    Type: Application
    Filed: September 3, 2015
    Publication date: January 12, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang