Patents by Inventor I-Ming Tseng

I-Ming Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170263454
    Abstract: A method for forming fin structure includes following steps. A substrate is provided. A first mandrel and a plurality of second mandrels are formed on the substrate simultaneously. A plurality of spacers are respectively formed on sidewalls of the first mandrel and the second mandrels and followed by removing the first mandrel and the second mandrels to form a first spacer pattern and a plurality of second spacer patterns. Then the substrate is etched to simultaneously form at least a first fin and a plurality of second fins on the substrate with the first spacer pattern and the second spacer patterns serving as an etching mask. At least one of the second fins is immediately next to the first fin, and a fin width of the first fin is larger than a fin width of the second fins. Then, the second fins are removed from the substrate.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 14, 2017
    Inventors: Kuan-Hsien Li, Rai-Min Huang, I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9755048
    Abstract: A patterned structure of a semiconductor device includes a substrate, a first feature and a second feature. The first feature and the second feature are disposed on the substrate, and either of which includes a vertical segment and a horizontal segment. There is a distance between the vertical segment of the first feature and the vertical segment of the second feature, and the distance is less than the minimum exposure limits of an exposure apparatus.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: September 5, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Rai-Min Huang, I-Ming Tseng, Tong-Jyun Huang, Kuan-Hsien Li
  • Publication number: 20170207129
    Abstract: The present invention further provides a method for forming a semiconductor device, comprising: first, a substrate having a fin structure disposed thereon is provided, wherein the fin structure has a trench, next, a first liner in the trench is formed, a first insulating layer is formed on the first liner, afterwards, a shallow trench isolation is formed in the substrate and surrounding the fin structure, wherein a bottom surface of the shallow trench isolation is higher than a bottom surface of the first insulating layer, and a top surface of the shallow trench isolation is lower than a top surface of the first insulating layer, and a dummy gate structure is formed on the first insulating layer and disposed above the trench, wherein a bottom surface of the dummy gate structure and a top surface of the fin structure are on a same level.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170154823
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a first shallow trench isolation (STI) around the fin-shaped structure; dividing the fin-shaped structure into a first portion and a second portion; and forming a second STI between the first portion and the second portion.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 1, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9653402
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: May 16, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170092643
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9607985
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: March 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9608062
    Abstract: The present invention provides a semiconductor structure including a fin structure formed on a substrate, and an isolation structure formed in the fin structure. The isolation structure includes a trench, and a first dielectric layer disposed in the trench wherein the first dielectric layer includes a body portion in the bottom, a protruding portion in the top with a top surface, and a shoulder portion connecting the body portion and the protruding portion. The protruding portion has a smaller width than the body portion. The semiconductor structure further includes a second dielectric layer covering a top corner of the trench and sandwiched between the protruding portion, the shoulder portion of the first dielectric layer and the upper sidewall of the trench.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: March 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Publication number: 20170047244
    Abstract: A fin structure cutting process includes the following steps. Four fin structures are formed in a substrate, where the four fin structures including a first fin structure, a second fin structure, a third fin structure and a fourth fin structure are arranged sequentially and parallel to each other. A first fin structure cutting process is performed to remove top parts of the second fin structure and the third fin structure, thereby a first bump being formed from the second fin structure, and a second bump being formed from the third fin structure. A second fin structure cutting process is performed to remove the second bump and the fourth fin structure completely, but to preserve the first bump beside the first fin structure. Moreover, the present invention provides a fin structure formed by said process.
    Type: Application
    Filed: October 28, 2016
    Publication date: February 16, 2017
    Inventors: Tong-Jyun Huang, Rai-Min Huang, I-Ming Tseng, Kuan-Hsien Li, Chen-Ming Huang
  • Publication number: 20170012000
    Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.
    Type: Application
    Filed: September 3, 2015
    Publication date: January 12, 2017
    Inventors: I-Ming Tseng, Wen-An Liang, Chen-Ming Huang
  • Patent number: 9526338
    Abstract: A mounting bracket for a slide assembly includes a side wall, an end wall, at least one installation member, a stop, and a resilient member. The end wall is substantially perpendicular to the side wall. The at least one installation member is connected to the end wall. The stop is pivotably connected to the side wall and includes a first portion and a middle portion which is connected to the first portion. The middle portion has a first end portion. The resilient member provides a force to the stop to position the first end portion of the stop to be located corresponding to the end wall.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: December 27, 2016
    Assignees: King Slide Works Co., Ltd., King Slide Technology Co., Ltd.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, I-Ming Tseng, Chun-Yi Ho, Chun-Chiang Wang
  • Patent number: 9524909
    Abstract: A fin structure cutting process includes the following steps. Four fin structures are formed in a substrate, where the four fin structures including a first fin structure, a second fin structure, a third fin structure and a fourth fin structure are arranged sequentially and parallel to each other. A first fin structure cutting process is performed to remove top parts of the second fin structure and the third fin structure, thereby a first bump being formed from the second fin structure, and a second bump being formed from the third fin structure. A second fin structure cutting process is performed to remove the second bump and the fourth fin structure completely, but to preserve the first bump beside the first fin structure. Moreover, the present invention provides a fin structure formed by said process.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: December 20, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tong-Jyun Huang, Rai-Min Huang, I-Ming Tseng, Kuan-Hsien Li, Chen-Ming Huang
  • Patent number: 9466691
    Abstract: A fin shaped structure and a method of forming the same, wherein the method includes forming a fin structure on a substrate. Next, an insulation layer is formed on the substrate and surrounds the fin structure, wherein the insulation layer covers a bottom portion of the fin structure to expose an exposed portion of the fin structure protruded from the insulation layer. Then, a buffer layer is formed on the fin structure. Following this, a threshold voltage implantation process is performed to penetrate through the buffer layer after forming the insulation layer, to form a first doped region on the exposed portion of the fin structure.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: October 11, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: I-Ming Tseng, Rai-Min Huang, Tong-Jyun Huang, Kuan-Hsien Li, Chen-Ming Huang
  • Publication number: 20160293726
    Abstract: A patterned structure of a semiconductor device includes a substrate, a first feature and a second feature. The first feature and the second feature are disposed on the substrate, and either of which includes a vertical segment and a horizontal segment. There is a distance between the vertical segment of the first feature and the vertical segment of the second feature, and the distance is less than the minimum exposure limits of an exposure apparatus.
    Type: Application
    Filed: May 13, 2015
    Publication date: October 6, 2016
    Inventors: Rai-Min Huang, I-Ming Tseng, Tong-Jyun Huang, Kuan-Hsien Li
  • Publication number: 20160293491
    Abstract: A fin structure cutting process includes the following steps. Four fin structures are formed in a substrate, where the four fin structures including a first fin structure, a second fin structure, a third fin structure and a fourth fin structure are arranged sequentially and parallel to each other. A first fin structure cutting process is performed to remove top parts of the second fin structure and the third fin structure, thereby a first bump being formed from the second fin structure, and a second bump being formed from the third fin structure. A second fin structure cutting process is performed to remove the second bump and the fourth fin structure completely, but to preserve the first bump beside the first fin structure. Moreover, the present invention provides a fin structure formed by said process.
    Type: Application
    Filed: April 27, 2015
    Publication date: October 6, 2016
    Inventors: Tong-Jyun Huang, Rai-Min Huang, I-Ming Tseng, Kuan-Hsien Li, Chen-Ming Huang
  • Publication number: 20160276429
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a fin shaped structure, a spacer layer and a dummy gate structure. The fin shaped structure is disposed on a substrate, wherein the fin shaped structure has a trench. The spacer layer is disposed on sidewalls of the trench. The dummy gate structure is disposed across the trench and includes a portion thereof disposed in the trench.
    Type: Application
    Filed: April 13, 2015
    Publication date: September 22, 2016
    Inventors: I-Ming Tseng, Wen-An Liang, Rai-Min Huang, Chen-Ming Huang, Tong-Jyun Huang, Kuan-Hsien Li
  • Publication number: 20160260613
    Abstract: The present invention provides a semiconductor structure, comprising at least two gate electrodes disposed on a substrate, wherein each gate electrode is mushroom-shaped and respectively has a salicide region on a top of the gate electrode, wherein the width of the salicide region is larger than the width of the gate electrode. A recess is disposed between each gate electrode, wherein the recess has a recess extension disposed under the salicide region. A spacer fills the extension of the recess, wherein the profile of each gate electrode is a tapered surface, and a contact etching stop layer (CESL) covers the gate electrodes.
    Type: Application
    Filed: May 15, 2016
    Publication date: September 8, 2016
    Inventors: Yi-Wei Chen, Tsung-Hung Chang, I-Ming Tseng
  • Publication number: 20160141387
    Abstract: A fin shaped structure and a method of forming the same, wherein the method includes forming a fin structure on a substrate. Next, an insulation layer is formed on the substrate and surrounds the fin structure, wherein the insulation layer covers a bottom portion of the fin structure to expose an exposed portion of the fin structure protruded from the insulation layer. Then, a buffer layer is formed on the fin structure. Following this, a threshold voltage implantation process is performed to penetrate through the buffer layer after forming the insulation layer, to form a first doped region on the exposed portion of the fin structure.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 19, 2016
    Inventors: I-Ming Tseng, Rai-Min Huang, Tong-Jyun Huang, Kuan-Hsien Li, Chen-Ming Huang
  • Patent number: 9147612
    Abstract: The present invention provides a manufacturing method for forming a semiconductor structure, in which first, a substrate is provided, a hard mask is disposed on the substrate, the hard mask is then patterned to form a plurality of fin hard masks and a plurality of dummy fin hard masks, afterwards, a pattern transferring process is performed, to transfer the patterns of the fin hard masks and the fin hard masks into the substrate, so as to form a plurality of fin groups and a plurality of dummy fins. Each dummy fin is disposed on the end side of one fin group, and a fin cut process is performed, to remove each dummy fin.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: September 29, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Cheng Huang, I-Ming Tseng, Yu-Ting Li, Chun-Hsiung Wang, Wu-Sian Sie, Yi-Liang Liu, Chia-Lin Hsu, Po-Chao Tsao, Chien-Ting Lin, Shih-Fang Tzou
  • Publication number: 20150147874
    Abstract: The present invention provides a manufacturing method for forming a semiconductor structure, in which first, a substrate is provided, a hard mask is disposed on the substrate, the hard mask is then patterned to form a plurality of fin hard masks and a plurality of dummy fin hard masks, afterwards, a pattern transferring process is performed, to transfer the patterns of the fin hard masks and the fin hard masks into the substrate, so as to form a plurality of fin groups and a plurality of dummy fins. Each dummy fin is disposed on the end side of one fin group, and a fin cut process is performed, to remove each dummy fin.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Cheng Huang, I-Ming Tseng, Yu-Ting Li, Chun-Hsiung Wang, Wu-Sian Sie, Yi-Liang Liu, Chia-Lin Hsu, Po-Chao Tsao, Chien-Ting Lin, Shih-Fang Tzou