Patents by Inventor I-Shih Tseng

I-Shih Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080266797
    Abstract: It's a type of top mount surface airflow heatsink, utilizing the upper ceiling wall separated by an air gap, working together with the upper surface of a heating device (microprocessor) producing an air current. It's a simple device, with a low cost using the Reynolds Equation Re=(?umd)/??2,500; with ? being the fluid density, um being the free-stream fluid velocity, d being the pipe distance or diameter, ? being the fluid viscosity. Since the airflow produces air turbulence, it causes the frequent heat exchanges in the air. It also causes the obvious temperature changes within the different layers of air. Therefore, it increases tremendously, the efficiency of dissipating the heat. It requires only the input of the air. The operation is simple and it allows the usage of even higher heat generating devices. Thus it promotes the alternative usage of this top mount heatsink device within the installation of circuit board components.
    Type: Application
    Filed: November 1, 2007
    Publication date: October 30, 2008
    Applicant: Chroma Ate. Inc.
    Inventor: I-Shih Tseng
  • Patent number: 6925415
    Abstract: A measuring method and system for liquid crystal display driver chips applies a new method to measure voltages of driver chips, and utilizes probability and statistics for analysis and determination so as to yield a rather accurate effect even under noisy environments. Accordingly, analog-to-digital converters can be replaced for faster sampling. The measuring method and system can be implemented using comparator circuits or pin electronics cards so that the measuring procedure for driver chips is simplified. Measured results are analyzed and verified by application of probability and statistics. As such, testing of liquid crystal display driver chips is more accurate, testing time is reduced, and accuracy level is promoted.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: August 2, 2005
    Assignee: Chroma Ate Inc.
    Inventors: I-Shih Tseng, Chau-Chin Su, Wei-Juo Wang
  • Publication number: 20030171883
    Abstract: A measuring method and system for liquid crystal display driver chips applies a new method to measure voltages of driver chips, and utilizes probability and statistics for analysis and determination so as to yield a rather accurate effect even under noisy environments. Accordingly, analog-to-digital converters can be replaced for faster sampling. The measuring method and system can be implemented using comparator circuits or pin electronics cards so that the measuring procedure for driver chips is simplified. Measured results are analyzed and verified by application of probability and statistics. As such, testing of liquid crystal display driver chips is more accurate, testing time is reduced, and accuracy level is promoted.
    Type: Application
    Filed: February 25, 2003
    Publication date: September 11, 2003
    Inventors: I-Shih Tseng, Chau-Chin Su, Wei-Juo Wang
  • Patent number: 6304119
    Abstract: A timing generating apparatus includes a master timing module adapted to receive an external reference clock and to generate a coarse timing pulse signal. A slave timing module is coupled electrically to the master timing module and receives the coarse timing pulse signal, from which a fine timing pulse signal is generated. A calibration module coupled electrically to the master timing module and the slave timing module receives the coarse timing pulse signal and the fine timing pulse signal, determines a phase difference value between the two, and generates a phase compensation signal corresponding to difference between the phase difference value and a predetermined phase difference value. The slave timing module includes a delay control unit and a voltage-controlled delay unit, which introduce a phase delay into the coarse timing pulse signal so as to generate the fine timing pulse signal.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: October 16, 2001
    Assignee: Chroma Ate Inc.
    Inventors: Huan-Ming Tseng, I-Shih Tseng, Chau-Chin Su, Chih-Hung Lin, Chun-Min Yang
  • Patent number: 6047114
    Abstract: The present invention discloses a method of constructing the testing procedure of an analog circuit by applying the fault classification tables of the analog circuit. The constructing method classifies the fault classification tables to establish a decision tree. Entropy definitions are defined and the decision tree is thus established by following the rule of decreasing the entropy values. A search procedure of the decision tree can be performed as to find the failure mode next time when the analog circuit is detected.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: April 4, 2000
    Assignee: Institute for Information Industry
    Inventors: I-Shih Tseng, Ying-Kun Tsao, Shou-Chieh Chang, Wei-Lung Mao, Yi-Fan Chan
  • Patent number: 6035114
    Abstract: The present invention discloses a method for constructing the fault classification tables of analog circuits, and the fault classification tables can be further applied to construct analog CAT tools. The constructing method uses the fault models but the normal models inserting in parts of the analog circuit components, and then utilizes a circuit simulator to obtain waveform from the defect analog circuit. Exclusive and non-exclusive classification schemes are applied to establish the failure modes of the defect analog circuit when the waveform is recorded as a fault dictionary. It is unnecessary to construct a real analog circuit as the conventional does.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: March 7, 2000
    Assignee: Institute for Information Industry
    Inventors: I-Shih Tseng, Ying-Kun Tsao, Shou-Chieh Chang, Wei-Lung Mao, Yi-Fan Chan