Abstract: A bus bridge on a primary RAID controller receives user write data from a host and writes the data to its write cache and also broadcasts the data over a high speed link (e.g., PCI-Express) to a secondary RAID controller's bus bridge, which writes the data to its mirroring write cache. However, before writing the data, the second bus bridge automatically invalidates the cache buffers to which the data is to be written, which alleviates the primary controller's CPU from sending a message to the secondary controller's CPU to instruct it to invalidate the cache buffers. The secondary controller CPU programs its bus bridge at boot time with the base address of its mirrored write cache to enable it to detect that the cache buffer needs invalidating in response to the broadcast write, and with the base address of its directory that includes the cache buffer valid bits.

Abstract: A method of calibrating a gauge in particular for the measurement of film thickness, uses a calibration variable to compensate for short term changes in probe tip condition, instead of a constant value. A calibration constant is based only on the dielectric constant for a coating such as lacquer, and is independent of the probe tip variable.

Abstract: A fault-tolerant RAID system is disclosed. The system includes redundant RAID controllers coupled by a PCI-Express link. When a PCI-Express controller of one of the RAID controllers receives a PCI-Express memory write request transaction layer packet (TLP), it interprets a predetermined bit in the header as an interrupt request flag, rather than as its standard function specified by the PCI-Express specification. If the flag is set, the PCI-Express controller interrupts the processor after storing the message in the payload at the specified memory location. In one embodiment, an unused upper address bit in the header is used as the interrupt request flag. Additionally, unused predetermined bits in the TLP header are used as a message tag to indicate one of a plurality of message buffers on the receiving RAID controller into which the message has been written. The PCI-Express controller sets a corresponding bit in a register to indicate which message buffer was written.

Abstract: A fault-tolerant mass storage system includes two RAID controllers that communicate via a PCI-Express link. Each controller has a bus bridge coupled to the link, a cache memory that caches user data for storage on disk drives controlled by the controllers, and a CPU. The CPU fetches and executes program instructions from a CPU memory coupled to it. The CPU programs the bus bridge with window information defining a window of locations within the CPU memory, which is less than an entirety of the CPU memory. The bus bridge receives data on the link from the other controller and if the header of a packet containing the data indicates it is destined for the CPU memory, the bus bridge translates the address of the data so as to write the data safely to the CPU memory, but only within the window and nowhere else within the CPU memory.

Abstract: A system for performing an efficient mirrored posted-write operation having first and second RAID controllers in communication via a PCI-Express link is disclosed. The first bus bridge transmits a PCI-Express memory write request TLP to the second bus bridge. The TLP header includes an indication of whether the first CPU requests a certification that certifies the payload data has been written to the second write cache memory. If the indication requests the certification, the second bus bridge automatically transmits the certification to the first bus bridge independent of the second CPU, after writing the payload data to the second write cache memory. The first bus bridge generates an interrupt to the first CPU in response to receiving the certification. The certified transfer may be used to validate and/or invalidate mirrored copies of a write cache directory on the RAID controllers, among other uses.

Abstract: A set of injection mold sections are supported and secured to parallel spaced platens of an injection molding press by quick-change locking couplers including a plurality of projecting knobs or studs on each mold section. The studs are received within corresponding cylinders each having a tapered seat which engages a mating surface on the stud. Each cylinder also supports circumferentially spaced balls movable between locked positions engaging enlarged head portions of the studs and retracted released positions in response to axial movement of a spring biased piston within a housing. The pistons are moved to released positions in response to pressurized air supplied simultaneously to the housings. The locking couplers may be recessed within an adapter plate disposed between a mold section and the supporting platen, and the adapter plate has a pattern of threaded holes for mounting a conventional mold section.

Abstract: An apparatus for deterministically killing one of redundant servers integrated into a network storage appliance chassis along with at least one storage controller is disclosed. Each server can generate a kill signal on a backplane of the chassis to the other server in response to a stopped heartbeat of the other server in order to disable the I/O ports of the other server on a network so the live server can reliably take over the identity of the other server on the network. Unlike conventional kill paths, such as an Ethernet cable connecting the two servers in separate chassis, the present invention does not require the failed server to be operational since the kill path is substantially a direct reset to the I/O ports of the failed server. One server raises a shield before killing the other server to avoid both servers killing each other simultaneously.

Abstract: An apparatus for deterministically performing active-active failover of redundant server blades hot-pluggable into a backplane of a network storage appliance chassis is disclosed. Each server monitors the other's heartbeat on a respective path in the backplane. Other paths between the two servers on the backplane enable one server to reliably kill the other server and take over its identity on the network in response to detecting a stopped heartbeat of the other server. The apparatus is superior to a conventional heartbeat link between servers in separate chassis, such as an Ethernet cable, because it is not prone to user removal or damage since the backplane cannot be removed by a user while the appliance is operational and enables each server to know a true heartbeat failure has occurred, as opposed to failure of a conventional external heartbeat link causing each server to each think the other has failed.

Abstract: A storage controller configured to adopt orphaned I/O ports is disclosed. The controller includes multiple field-replaceable units (FRUs) that plug into a backplane having local buses. At least two of the FRUs have microprocessors and memory for processing I/O requests received from host computers for accessing storage devices controlled by the controller. Other of the FRUs include I/O ports for receiving the requests from the hosts and bus bridges for bridging the I/O ports to the backplane local buses in such a manner that if one of the processing FRUs fails, the surviving processing FRU detects the failure and responsively adopts the I/O ports previously serviced by the failed FRU to service the subsequently received I/O requests on the adopted I/O ports. The I/O port FRUs also include I/O ports for transferring data with the storage devices that are also adopted by the surviving processing FRU.

Abstract: A network storage appliance including one or more integrated switching devices is disclosed. The appliance includes redundant storage controllers that transfer frames of data between storage devices and host computers. The integrated switching devices include a plurality of I/O ports and a data transfer path between each of the I/O ports for providing simultaneous data transfers between multiple pairs thereof. The switches enable the appliance to simultaneously transfer frames between its I/O ports and storage device I/O ports and/or host I/O ports, thereby providing increased data transfer bandwidth over arbitrated loop configurations. Additionally, the switches are intelligent and may be programmed to achieve improved fault isolation. The appliance may also include servers that include I/O ports coupled to the switches for simultaneously transferring data with the storage controllers and/or I/O ports of devices external to the appliance.

Abstract: A storage controller that provides controlled access to storage devices by host computers is disclosed. The storage controller includes a host interface adapter that interfaces the storage controller to the hosts, a device interface adapter that interfaces the storage controller to the storage devices, and a microprocessor that processes requests by the hosts to access the storage devices. An access control table is created in response to user input in a memory accessible by the host interface adapter. When the host interface adapter receives a request, it determines from the access control table whether the requesting host has permission to access the specified storage device. If so, the host interface adapter forwards the request to the microprocessor. Otherwise, the host interface adapter transmits a response to the host denying access in one embodiment, or in another embodiment, provides an indication to the microprocessor that access should be denied.

Abstract: A network storage appliance is disclosed. The storage appliance includes a port combiner that provides data communication between at least first, second, and third I/O ports; a storage controller that controls storage devices and includes the first I/O port; a server having the second I/O port; and an I/O connector for networking the third I/O port to the port combiner. A single chassis encloses the port combiner, storage controller, and server, and the I/O connector is affixed on the storage appliance. The third I/O port is external to the chassis and is not enclosed therein. In various embodiments, the port combiner comprises a FibreChannel hub comprising a series of loop resiliency circuits, or a FibreChannel, Ethernet, or Infiniband switch. In one embodiment, the port combiner, I/O ports, and server are all comprised in a single blade module for plugging into a backplane of the chassis.

Abstract: An apparatus and method for deterministically killing one of redundant servers on a common network is disclosed. The apparatus includes a chassis that encloses the servers and a storage controller, status indicators generated by the servers to the storage controller, and kill controls, generated by the storage controller to respective ones of the servers, each for killing a respective one of the servers. The status indicators and kill controls are wholly enclosed in the chassis. The kill controls deterministically disable the killed server on the network independently of the state of the server to be killed. That is, the server does not need to be able to respond to a command to be disabled on the network. In one embodiment, the kill controls comprise reset signals. After the storage controller deterministically kills one of the servers, the other server takes over the identity of the killed server on the network.

Abstract: A network storage appliance is disclosed. The appliance includes a single chassis that encloses a plurality of servers and a plurality of storage controllers coupled together via a chassis backplane. The storage controllers control the transfer of data between the plurality of servers and a plurality of storage devices coupled to the storage controllers. The servers and storage controllers include a plurality of field replaceable unit (FRUs) hot-pluggable into the backplane such that any one of the FRUs may fail without loss of availability to the storage devices' data. In various embodiments, the chassis fits in a 19? wide rack; is 1U high; the servers are standard PCs configured to execute off-the-shelf server applications and to facilitate porting of popular operating systems with little modification; the servers include disk-on-chip memory rather than a hard drive; local buses (e.g., PCIX) on the backplane interface the various FRUs.

Abstract: An application server blade for an embedded storage appliance is disclosed. The blade includes a printed circuit board (PCB) with a connector for connecting to a chassis backplane including a local bus. Affixed on the PCB is a server, a portion of a storage controller, and an I/O link coupling the server and storage controller portion. The server transmits packets on the I/O link to the storage controller portion. The packets include commands to transfer data to a storage device controlled by the storage controller. The storage controller portion receives the packets from the server on the I/O link and forwards the commands on the backplane local bus to another portion of the storage controller affixed on a separate PCB also enclosed in the chassis. The blade also includes a removal mechanism for hot-replacement of the blade in the chassis. The blade architecture facilitates software reuse.

Abstract: A network storage appliance is disclosed. The appliance includes a chassis enclosing a backplane, and a server enclosed in the chassis and coupled to the backplane. The appliance also includes storage controllers enclosed in the chassis, each coupled to the backplane, which control transfer of data between the server and storage devices coupled to the storage controllers. The storage controllers also control transfer of data between the storage devices and computers networked to the appliance and external to the appliance. The storage controllers and the server comprise a plurality of hot-replaceable blades. Any one of the plurality of blades may be replaced during operation of the appliance without loss of access to the storage devices by the computers. In one embodiment, the server executes storage application software, such as backup software for backing up data on the storage devices, such as to a tape device networked to the server.

Abstract: An apparatus is disclosed for deterministically performing active-active failover of redundant servers in response to a failure of a link on which each server provides a heartbeat to the other server. Each of the servers is configured to take over the identity of the other server on a common network in response to detecting a failure of the other server's link heartbeat. Each server provides a status indicator to a storage controller indicating whether the other server's link heartbeat stopped. The storage controller determines the link has failed if both of the status indicators indicate the other server's heartbeat stopped, and responsively kills one of the servers. The storage controller also receives a heartbeat directly from each server. If only one direct heartbeat stops when the status indicators indicate the link heartbeats stopped, then the storage controller detects one server has failed and inactivates the failed server.

Abstract: Polymorphic, amorphous and hydrated forms of the title compound having the following structure: are disclosed. The compound is a potent and selective cyclooxygenase-2 (COX-2) inhibitor.

Abstract: cis-aminochromanols are obtained in high yield and with high selectivity over their trans counterparts by hydrogenating the corresponding oximes in the presence of a catalyst and an acid selected from HBr, HCl, and organic sulfonic acid. The cis-aminochromanols can be employed as intermediates in the production of HIV protease inhibitors which are useful for treating HIV infection and AIDS.

Abstract: cis-aminochromanols are obtained in high yield and with high selectivity over their trans counterparts by hydrogenating the corresponding oximes in the presence of a catalyst and an acid selected from HBr, HCl, and organic sulfonic acid. The cis-aminochromanols can be employed as intermediates in the production of HIV protease inhibitors which are useful for treating HIV infection and AIDS.