Abstract: A data buffer apparatus stores first data objects containing a plurality of first data items and second data objects containing one or more second data items in a number of different ways depending upon a mode of operation. The apparatus includes an encoder (1290) for rearranging the order of the first data items within the first data objects in accordance with first arranging mode, prior to storing in the buffer (1293). The apparatus also includes a decoder (1291) for rearranging the order of a plurality first data items read from the buffer, in accordance with a second arranging mode.

Abstract: The present invention discloses an image processor (224) for executing a computer instruction set (280, 290) in the form of an opcode (281), at least one operand (283-285) which is, or indicates the location of data to be processed. The data to be processed consists of a variable length stream of data and each instruction includes a length field (297) containing data specifying the number of items of data to be processed or, if that number exceeds the size of the length field, a predetermined location of a previously allocated storage area at which that number is stored.

Abstract: The present invention relates to an image processor (242) comprising a control register block (1470), a decoding block (1468), a data object processor (1462), and flow control logic. The control register block (1470) stores all the relevant information about the image processing operation. The decoding block (1468) decodes the information into configuration signals, which configure an input data object interface (1460). The input data object interface (1460) accepts and stores data objects from outside, and distributes these data objects to the data object processor (1462). For some image processing operations, the input data object interface (1460) may also generate addresses for data objects, so that the source of these data objects can provide the correct data objects. The data object processor (1462) performs arithmetic operations on the data objects received. The flow control logic controls the flow of data objects within the data object processing logic (1462).

Abstract: A graphics processor for performing graphical operations on graphical objects that are represented in an external data format selected from a set thereof includes a first mapping unit adapted to map one or more groups of different ones of the set of external data formats to corresponding one or more internal data formats selected from a set of internal data formats, a calculator for performing graphical operations on the graphical objects when in the one or more internal data formats, and a second mapping unit adapted to map each internal data format in the set of internal data formats to an external data format selected from the set of external data formats after the graphical operations have been performed.

Abstract: An apparatus for converting an input image in an input color space to an output image in an output color space. The apparatus has a cache memory for storing from external memory, sparsely located output color values corresponding to input pixels closest to the current input pixel of an image stream, if not already present in the cache memory. The apparatus also has retrieval means for retrieving, from said cache memory, the sparsely located output color values corresponding to the current input pixel of the stream. The retrieved output color values are interpolated by interpolation means to derive an output color value in said output color space.

Abstract: An apparatus for data normalization includes a FIFO buffer for receiving input data words, an input register for receiving a first data word from the FIFO buffer, and a combinatorial circuit for transforming the first data word in the input register and a subsequent data word from the FIFO buffer into a normalized output data word. The apparatus utilizes two or more independent instruction streams to increase the processing speed of the apparatus.