Patents by Inventor Ian HU

Ian HU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901252
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: February 13, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Han Wang, Ian Hu
  • Publication number: 20220375809
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Han WANG, Ian HU
  • Patent number: 11482482
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: October 25, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ian Hu, Jin-Feng Yang, Cheng-Yu Tsai, Hung-Hsien Huang
  • Patent number: 11410902
    Abstract: A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: August 9, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Han Wang, Ian Hu
  • Patent number: 11410934
    Abstract: A substrate, a semiconductor package device and a method of manufacturing a semiconductor device package are provided. The substrate includes a low density wiring structure, a first middle density wiring structure and high density wiring structure. The first middle density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure and the first middle density wiring structure are disposed side by side. A line space of a circuit layer of the low density wiring structure is greater than a line space of a circuit layer of the first middle density wiring structure. The line space of the circuit layer of the first middle density wiring structure is greater than a line space of a circuit layer of the high density wiring structure.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: August 9, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ian Hu, Shin-Luh Tarng
  • Publication number: 20220243992
    Abstract: A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Hsien HUANG, Shin-Luh TARNG, Ian HU, Chien-Neng LIAO, Jui-Cheng YU, Po-Cheng HUANG
  • Patent number: 11375124
    Abstract: An optical measurement equipment includes an adjustment apparatus and at least two image capturing devices. The image capturing devices have a depth-of-field and attached to the adjustment apparatus. The image capturing devices are adjusted by the adjustment apparatus such that a portion to be measured of a workpiece is located within the depth-of-field of the image capturing devices.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: June 28, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Han Wang, Ian Hu, Meng-Kai Shih, Hsuan Yu Chen
  • Publication number: 20220093528
    Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes a redistribution structure, a first electronic device, at least one second electronic device, a protection material, a heat dissipation structure and a reinforcement structure. The first electronic device is disposed on the redistribution structure. The second electronic device is disposed on the redistribution structure. The protection material is disposed between the first electronic device and the second electronic device. The heat dissipation structure is disposed on the first electronic device and the second electronic device. The reinforcement structure is disposed in an accommodating space between the heat dissipation structure and the protection material.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Ian HU
  • Patent number: 11282767
    Abstract: A semiconductor package structure includes a package substrate and a semiconductor die. The package substrate includes a plurality of hollow vias extending through the package substrate. The semiconductor die is electrically connected to the package substrate. The hollow vias are disposed under the semiconductor die.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: March 22, 2022
    Assignee: ADVANCED SEMICONDUTOR ENGINEERING, INC.
    Inventors: Hsin-En Chen, Ian Hu, Jung-Che Tsai
  • Publication number: 20220084926
    Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 17, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ian HU, Jin-Feng YANG, Cheng-Yu TSAI, Hung-Hsien HUANG
  • Patent number: 11217502
    Abstract: A semiconductor device package includes a substrate, an electronic component disposed on the substrate, a supporting structure disposed on the substrate and surrounding the electronic component, and a heat spreading structure disposed on the supporting structure. A length of the supporting structure and a length of the heat spreading structure are greater than a length of the substrate.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: January 4, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ian Hu, Meng-Kai Shih, Chih-Pin Hung
  • Publication number: 20210327815
    Abstract: A substrate, a semiconductor package device and a method of manufacturing a semiconductor device package are provided. The substrate includes a low density wiring structure, a first middle density wiring structure and high density wiring structure. The first middle density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure is electrically connected to the low density wiring structure. The high density wiring structure and the first middle density wiring structure are disposed side by side. A line space of a circuit layer of the low density wiring structure is greater than a line space of a circuit layer of the first middle density wiring structure. The line space of the circuit layer of the first middle density wiring structure is greater than a line space of a circuit layer of the high density wiring structure.
    Type: Application
    Filed: April 16, 2020
    Publication date: October 21, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ian HU, Shin-Luh TARNG
  • Patent number: 11152274
    Abstract: A semiconductor device package includes a semiconductor device, a conductive bump, a first encapsulant and a second encapsulant. The semiconductor device has a first surface, a second surface and a lateral surface. The second surface is opposite to the first surface. The lateral surface extends between the first surface and the second surface. The semiconductor device comprises a conductive pad adjacent to the first surface of the semiconductor device. The conductive bump is electrically connected to the conductive pad. The first encapsulant covers the first surface of the semiconductor device and a first portion of the lateral surface of the semiconductor device, and surrounds the conductive bump. The second encapsulant covers the second surface of the semiconductor device and a second portion of the lateral surface of the semiconductor device.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: October 19, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Sung-Mao Li, Ming-Han Wang, Ian Hu
  • Patent number: 11139222
    Abstract: An electronic device includes a main substrate, a semiconductor package structure and at least one heat pipe. The semiconductor package structure is electrically connected to the main substrate, and includes a die mounting portion, a semiconductor die and a cover structure. The semiconductor die is disposed on the die mounting portion. The cover structure covers the semiconductor die. The heat pipe contacts the cover structure for dissipating a heat generated by the semiconductor die.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: October 5, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jung-Che Tsai, Ian Hu, Chih-Pin Hung
  • Patent number: 11139226
    Abstract: A semiconductor package structure includes a vapor chamber, a plurality of electrical contacts, a semiconductor die and an encapsulant. The vapor chamber defines an enclosed chamber for accommodating a working liquid. The electrical contacts surround the vapor chamber. The semiconductor die is disposed on the vapor chamber, and electrically connected to the electrical contacts through a plurality of bonding wires. The encapsulant covers a portion of the vapor chamber, portions of the electrical contacts, the semiconductor die and the bonding wires.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: October 5, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsin-En Chen, Ian Hu, Hung-Hsien Huang
  • Publication number: 20210265273
    Abstract: A semiconductor device package includes a plurality of semiconductor chips and an interposer structure. The interposer structure has a plurality of tiers for accommodating the plurality of semiconductor chips. The interposer structure includes at least one conductive via connecting to a pad of the plurality of semiconductor chips.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 26, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien Lin CHANG CHIEN, Chiu-Wen LEE, Ian HU, Chang Chi LEE
  • Patent number: 11081420
    Abstract: A semiconductor package structure includes a package substrate, at least one semiconductor die, a heat dissipating device, at least one electronic device and a heat transmitting structure. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The heat dissipating device is thermally connected to the first surface of the package substrate. The electronic device is electrically connected to the second surface of the package substrate. The electronic device has a first surface and a second surface opposite to the first surface, and the first surface of the electronic device faces the second surface of the package substrate. The heat transmitting structure is disposed adjacent to the second surface of the package substrate, and thermally connected to the electronic device and the heat dissipating device.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: August 3, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsin-En Chen, Ian Hu, Chih-Pin Hung
  • Patent number: 11075186
    Abstract: A semiconductor package includes a substrate, a semiconductor chip and a heat dissipation structure. The semiconductor chip includes a first surface, a second surface opposite to the first surface, and at least one chip pad disposed adjacent to the first surface. The chip pad is electrically connected to the substrate. The heat dissipation structure is disposed adjacent to the second surface of the semiconductor chip and a portion of the substrate. An area of the heat dissipation structure is greater than an area of the semiconductor chip.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: July 27, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ian Hu, Jia-Rung Ho, Jin-Feng Yang, Chih-Pin Hung, Ping-Feng Yang
  • Publication number: 20210166987
    Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.
    Type: Application
    Filed: February 11, 2021
    Publication date: June 3, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ian HU, Cheng-Yu TSAI
  • Patent number: 11024557
    Abstract: A semiconductor package structure includes a package substrate, a semiconductor die, a vapor chamber and a heat dissipating device. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The vapor chamber is thermally connected to a first surface of the semiconductor die. The vapor chamber defines an enclosed chamber for accommodating a first working liquid. The heat dissipating device is thermally connected to the vapor chamber. The heat dissipating device defines a substantially enclosed space for accommodating a second working liquid.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: June 1, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsin-En Chen, Ian Hu, Jin-Feng Yang