Patents by Inventor Ian McCallum

Ian McCallum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916780
    Abstract: A system and method to transmit frames from a first node to a second node over a plurality of radio links comprising a classifier to classify said frames according to one of a plurality of flow and a sequence number within said one of said plurality of flow and adding said flow and sequence number in a header of said classified frame a splitter receiving said classified frames from said classifier and distributing said classified frames on one of said plurality of radio links for transmission to said second node, a joiner receiving said classified frames and reordering them using an indexed sequence queue corresponding to each of said plurality of flows, a timer for waiting for frames missing in the sequence in one of said indexed sequence queue, wherein when said timer expires, if said frame has not arrived it is deemed lost and a forwarder to extract frames from said sequence queue to forward.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 27, 2024
    Assignee: Aviat U.S., Inc.
    Inventors: Ian McCallum, Bogdan Barna, Andrew Spurgeon
  • Publication number: 20240049055
    Abstract: Disclosed are wireless communications systems including implementation of an adaptive distributed configuration of base stations. The base stations use an inter-base station protocol to exchange configuration data for use in configuring the base stations according to an identical solution independently determined by each of the base stations.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 8, 2024
    Inventors: Ian McCallum, Bradford Stimpson
  • Patent number: 11749559
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: September 5, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli
  • Publication number: 20230088112
    Abstract: A system and method to transmit frames from a first node to a second node over a plurality of radio links comprising a classifier to classify said frames according to one of a plurality of flow and a sequence number within said one of said plurality of flow and adding said flow and sequence number in a header of said classified frame a splitter receiving said classified frames from said classifier and distributing said classified frames on one of said plurality of radio links for transmission to said second node, a joiner receiving said classified frames and reordering them using an indexed sequence queue corresponding to each of said plurality of flows, a timer for waiting for frames missing in the sequence in one of said indexed sequence queue, wherein when said timer expires, if said frame has not arrived it is deemed lost and a forwarder to extract frames from said sequence queue to forward.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 23, 2023
    Inventors: Ian McCallum, Bogdan Barna, Andrew Spurgeon
  • Publication number: 20230063731
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 2, 2023
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli
  • Patent number: 11558284
    Abstract: A system and method to transmit frames from a first node to a second node over a plurality of radio links comprising a classifier to classify said frames according to one of a plurality of flow and a sequence number within said one of said plurality of flow and adding said flow and sequence number in a header of said classified frame a splitter receiving said classified frames from said classifier and distributing said classified frames on one of said plurality of radio links for transmission to said second node, a joiner receiving said classified frames and reordering them using an indexed sequence queue corresponding to each of said plurality of flows, a timer for waiting for frames missing in the sequence in one of said indexed sequence queue, wherein when said timer expires, if said frame has not arrived it is deemed lost and a forwarder to extract frames from said sequence queue to forward.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: January 17, 2023
    Assignee: Redline Communications Inc.
    Inventors: Ian McCallum, Bogdan Barna, Andrew Spurgeon
  • Publication number: 20220400450
    Abstract: A self-synchronization sensor system is provided. A self-synchronization sensor system for tracking fast moving assets comprising a plurality of beacons with known coordinates in a tunnel communicating with said plurality of beacons periodically during a synchronization interval and adjusting a beacon interval for each of said plurality of beacons such that one or more beacon messages are transmitted in short time intervals to the plurality of beacons in close proximity. The synchronization interval comprising a plurality of time slots, a first beacon from the plurality of beacons assigned a first time slot from the plurality of time slots within the synchronization interval and launches an origin and a progression of time slot allocation of the plurality of time slots from the origin based on the communication between the plurality of beacons.
    Type: Application
    Filed: June 9, 2021
    Publication date: December 15, 2022
    Inventor: Ian McCALLUM
  • Patent number: 11527432
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: December 13, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli
  • Publication number: 20210409309
    Abstract: A system and method to transmit frames from a first node to a second node over a plurality of radio links comprising a classifier to classify said frames according to one of a plurality of flow and a sequence number within said one of said plurality of flow and adding said flow and sequence number in a header of said classified frame a splitter receiving said classified frames from said classifier and distributing said classified frames on one of said plurality of radio links for transmission to said second node, a joiner receiving said classified frames and reordering them using an indexed sequence queue corresponding to each of said plurality of flows, a timer for waiting for frames missing in the sequence in one of said indexed sequence queue, wherein when said timer expires, if said frame has not arrived it is deemed lost and a forwarder to extract frames from said sequence queue to forward.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Ian McCallum, Bogdan Barna, Andrew Spurgeon
  • Publication number: 20210367308
    Abstract: In accordance with at least selected embodiments, novel or improved porous membranes or substrates, separator membranes, separators, composites, electrochemical devices, batteries, methods of making such membranes or substrates, separators, and/or batteries, and/or methods of using such membranes or substrates, separators and/or batteries are disclosed. In accordance with at least certain embodiments, novel or improved microporous membranes, battery separator membranes, separators, energy storage devices, batteries including such separators, methods of making such membranes, separators, and/or batteries, and/or methods of using such membranes, separators and/or batteries are disclosed. In accordance with at least certain selected embodiments, a separator for a battery which has an oxidation protective and binder-free deposition layer which is stable up to 5.2 volts or more, for example, up to 7 volts, in a battery is disclosed.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 25, 2021
    Inventors: Lie Shi, C. Glen Wensley, Zhengming Zhang, Katharine Chemelewski, Junqing Ma, Ronnie E. Smith, Kwantai Cho, Weifeng Fang, Changqing Wang Adams, Ian McCallum, Jun Nada, Shante P. Williams, Jacob S. Mangum
  • Patent number: 11158535
    Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. Shallow trench isolation regions extend from a top surface of a semiconductor substrate into the semiconductor substrate. The semiconductor substrate contains single-crystal semiconductor material, and the shallow trench isolation regions are positioned to surround an active device region of the semiconductor substrate. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer has a first section beneath the active device region and a second section beneath the plurality of shallow trench isolation regions. The first section of the polycrystalline layer is located at a different depth relative to the top surface of the semiconductor substrate than the second section of the polycrystalline layer.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: October 26, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Steven M. Shank, Anthony K. Stamper, Siva P. Adusumilli, Ian McCallum-Cook, Michel J. Abou-Khalil
  • Patent number: 11094995
    Abstract: In accordance with at least selected embodiments, novel or improved porous membranes or substrates, separator membranes, separators, composites, electrochemical devices, batteries, methods of making such membranes or substrates, separators, and/or batteries, and/or methods of using such membranes or substrates, separators and/or batteries are disclosed. In accordance with at least certain embodiments, novel or improved microporous membranes, battery separator membranes, separators, energy storage devices, batteries including such separators, methods of making such membranes, separators, and/or batteries, and/or methods of using such membranes, separators and/or batteries are disclosed. In accordance with at least certain selected embodiments, a separator for a battery which has an oxidation protective and binder-free deposition layer which is stable up to 5.2 volts or more, for example, up to 7 volts, in a battery is disclosed.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: August 17, 2021
    Assignee: Celgard, LLC
    Inventors: Lie Shi, C. Glen Wensley, Zhengming Zhang, Katharine Chemelewski, Junqing Ma, Ronnie E. Smith, Kwantai Cho, Weifeng Fang, Changqing Wang Adams, Ian McCallum, Jun Nada, Shante P. Williams, Jacob S. Mangum
  • Publication number: 20210111063
    Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. Shallow trench isolation regions extend from a top surface of a semiconductor substrate into the semiconductor substrate. The semiconductor substrate contains single-crystal semiconductor material, and the shallow trench isolation regions are positioned to surround an active device region of the semiconductor substrate. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer has a first section beneath the active device region and a second section beneath the plurality of shallow trench isolation regions. The first section of the polycrystalline layer is located at a different depth relative to the top surface of the semiconductor substrate than the second section of the polycrystalline layer.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 15, 2021
    Inventors: Steven M. Shank, Anthony K. Stamper, Siva P. Adusumilli, Ian McCallum-Cook, Michel J. Abou-Khalil
  • Publication number: 20210074577
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Application
    Filed: November 2, 2020
    Publication date: March 11, 2021
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli
  • Patent number: 10832940
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: November 10, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli
  • Publication number: 20200176589
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. A semiconductor layer is implanted over a first depth range of an inert gas species to modify the crystal structure of a semiconductor material of the semiconductor layer and form a first modified region. The semiconductor layer is annealed with a first annealing process to convert the semiconductor material within the first modified region to a non-single-crystal layer. The semiconductor layer is also implanted with ions of an element over a second depth range to modify the crystal structure of the semiconductor material of the semiconductor layer and form a second modified region containing a concentration of the element. The semiconductor layer is annealed with a second annealing process to convert the semiconductor material within the second modified region to an insulator layer containing the element.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 4, 2020
    Inventors: Siva P. Adusumilli, John J. Ellis-Monaghan, Anthony K. Stamper, Ian McCallum-Cook, Mark Goldstein
  • Publication number: 20200161218
    Abstract: Through-substrate vias (TSVs) extend through a high resistivity semiconductor substrate laterally spaced and isolated from an active device formed over the substrate by deep trench isolation (DTI) structures. The deep trench isolation structures may extend partially or entirely through the substrate, and may include an air gap. The deep trench isolation structures entirely surround the active device and the TSVs.
    Type: Application
    Filed: November 16, 2018
    Publication date: May 21, 2020
    Inventors: Steven SHANK, Ian MCCALLUM-COOK, John HALL
  • Patent number: 10651281
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. A semiconductor layer is implanted over a first depth range of an inert gas species to modify the crystal structure of a semiconductor material of the semiconductor layer and form a first modified region. The semiconductor layer is annealed with a first annealing process to convert the semiconductor material within the first modified region to a non-single-crystal layer. The semiconductor layer is also implanted with ions of an element over a second depth range to modify the crystal structure of the semiconductor material of the semiconductor layer and form a second modified region containing a concentration of the element. The semiconductor layer is annealed with a second annealing process to convert the semiconductor material within the second modified region to an insulator layer containing the element.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: May 12, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Siva P. Adusumilli, John J. Ellis-Monaghan, Anthony K. Stamper, Ian McCallum-Cook, Mark Goldstein
  • Patent number: 10643927
    Abstract: Through-substrate vias (TSVs) extend through a high resistivity semiconductor substrate laterally spaced and isolated from an active device formed over the substrate by deep trench isolation (DTI) structures. The deep trench isolation structures may extend partially or entirely through the substrate, and may include an air gap. The deep trench isolation structures entirely surround the active device and the TSVs.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: May 5, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Steven Shank, Ian McCallum-Cook, John Hall
  • Publication number: 20190295881
    Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A first non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. A second non-single-crystal layer is arranged beneath the trench isolation regions and the active device region. The first non-single-crystal layer is arranged between the second non-single-crystal layer and the active device region.
    Type: Application
    Filed: December 13, 2018
    Publication date: September 26, 2019
    Inventors: Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook, Siva P. Adusumilli