Abstract: Structures with altered crystallinity beneath semiconductor devices and methods associated with forming such structures. Trench isolation regions surround an active device region composed of a single-crystal semiconductor material. A non-single-crystal layer has a first section arranged beneath the trench isolation regions and a second section arranged beneath the active device region. The first section of the non-single-crystal layer has a first width in a vertical direction. The second section of the non-single-crystal layer has a second width in the vertical direction that is less than the first width of the first section of the non-single-crystal layer.

Abstract: An integrated circuit (IC) structure is disclosed. The structure can include: an insulator positioned over a device layer; a capping layer positioned over the insulator; an inter-layer dielectric (ILD) positioned over the capping layer; a first metal wire positioned over the ILD, and outside an active area of the IC structure; a continuous metal crack stop in contact with, and interposed between, the first metal wire and the device layer, such that the continuous metal crack stop extends through at least the insulator, the capping layer, and the ILD; a second metal wire positioned over the ILD, and within the active area of the IC structure; and two vias vertically coupled to each other and interposed between the second metal wire and the device layer, such that the two vias extend through at least the insulator, the capping layer, and the ILD.

Abstract: An integrated circuit (IC) structure is disclosed. The structure can include: an insulator positioned over a device layer; a capping layer positioned over the insulator; an inter-layer dielectric (ILD) positioned over the capping layer; a first metal wire positioned over the ILD, and outside an active area of the IC structure; a continuous metal crack stop in contact with, and interposed between, the first metal wire and the device layer, such that the continuous metal crack stop extends through at least the insulator, the capping layer, and the ILD; a second metal wire positioned over the ILD, and within the active area of the IC structure; and two vias vertically coupled to each other and interposed between the second metal wire and the device layer, such that the two vias extend through at least the insulator, the capping layer, and the ILD.

Abstract: Structures for a chip, as well as methods of fabricating such chip structures. The chip including a portion of a substrate, an active circuit region associated with the portion of the substrate, an interconnect structure on the active circuit region, and a crackstop extending through the interconnect structure. A groove extends through the interconnect structure to the substrate at a location exterior of the crackstop. A stress-containing layer is formed on at least a portion of the groove.

Abstract: A system for communicating wireless signals between one or more sector controllers (SC) and one or more subscriber stations (SS) using different channels and different beams, wherein each of the one or more SS and the SC has a corresponding highly directional antenna; the one or more SC comprises a first SC; the one or more SS comprises a first SS; the first SS obtains network topology awareness (NTA) data from the first SC; the first SS selects a channel, a beam, and one of the one or more SC to establish an RF link based on the NTA data; and the first SS communicating with the selected SC using the established RF link.

Abstract: Electrical fuses and methods for forming an electrical fuse. A semiconductor substrate is implanted to define a modified region in the semiconductor substrate. Trenches that surround the modified region and that penetrate into the semiconductor substrate to a depth greater than a depth of the modified region are formed in the modified region so as to define a fuse link of the electrical fuse. The substrate is removed from beneath the fuse link with a selective etching process that removes the semiconductor substrate with a first etch rate that is higher than a second etch rate of the modified region.

Abstract: In accordance with at least selected embodiments, novel or improved porous membranes or substrates, separator membranes, separators, composites, electrochemical devices, batteries, methods of making such membranes or substrates, separators, and/or batteries, and/or methods of using such membranes or substrates, separators and/or batteries are disclosed. In accordance with at least certain embodiments, novel or improved microporous membranes, battery separator membranes, separators, energy storage devices, batteries including such separators, methods of making such membranes, separators, and/or batteries, and/or methods of using such membranes, separators and/or batteries are disclosed. In accordance with at least certain selected embodiments, a separator for a battery which has an oxidation protective and binder-free deposition layer which is stable up to 5.2 volts or more, for example, up to 7 volts, in a battery is disclosed.

Abstract: A system for communicating wireless signals between one or more sector controllers (SC) and one or more subscriber stations (SS) using different channels and different beams, wherein each of the one or more SS and the SC has a corresponding highly directional antenna; the one or more SC comprises a first SC; the one or more SS comprises a first SS; the first SS obtains network topology awareness (NTA) data from the first SC; the first SS selects a channel, a beam, and one of the one or more SC to establish an RF link based on the NTA data; and the first SS communicating with the selected SC using the established RF link.

Abstract: Electrical fuses and methods for forming an electrical fuse. A semiconductor substrate is implanted to define a modified region in the semiconductor substrate. Trenches that surround the modified region and that penetrate into the semiconductor substrate to a depth greater than a depth of the modified region are formed in the modified region so as to define a fuse link of the electrical fuse. The substrate is removed from beneath the fuse link with a selective etching process that removes the semiconductor substrate with a first etch rate that is higher than a second etch rate of the modified region.

Abstract: A system for communicating wireless signals between one or more sector controllers (SC) and one or more subscriber stations (SS) using different channels and different beams, wherein each of the one or more SS and the SC has a corresponding highly directional antenna; the one or more SC comprises a first SC; the one or more SS comprises a first SS; the first SS obtains network topology awareness (NTA) data from the first SC; the first SS selects a channel, a beam, and one of the one or more SC to establish an RF link based on the NTA data; and the first SS communicating with the selected SC using the established RF link.

Abstract: A battery pack includes a plurality of prismatic format batteries in a stacked configuration. Flexible graphite sheet heat spreaders are interposed between adjacent prismatic batteries in the stack. A heat sink extends the length of the stack of prismatic format batteries. Both heat spreader major surfaces contact the heat sink at contact areas and thereby extend into the heat sink by at least 30 percent of the thru-thickness of the heat sink.

Abstract: A high resistivity substrate final resistance test structure, methods of manufacture and testing processes are disclosed. The test structure includes spaced apart implants extending into a high resistivity wafer in at least one kerf region of the wafer. The test structure further includes contacts in direct electrical contact to each of the spaced apart implants.

Abstract: A high resistivity substrate final resistance test structure, methods of manufacture and testing processes are disclosed. The test structure includes spaced apart implants extending into a high resistivity wafer in at least one kerf region of the wafer. The test structure further includes contacts in direct electrical contact to each of the spaced apart implants.

Abstract: A system for communicating wireless signals between one or more sector controllers (SC) and one or more subscriber stations (SS) using different channels and different beams, wherein each of the one or more SS and the SC has a corresponding highly directional antenna; the one or more SC comprises a first SC; the one or more SS comprises a first SS; the first SS obtains network topology awareness (NTA) data from the first SC; the first SS selects a channel, a beam, and one of the one or more SC to establish an RF link based on the NTA data; and the first SS communicating with the selected SC using the established RF link.

Abstract: A battery pack includes a plurality of prismatic format batteries in a stacked configuration. Flexible graphite sheet heat spreaders are interposed between adjacent prismatic batteries in the stack. A heat sink extends the length of the stack of prismatic format batteries. Both heat spreader major surfaces contact the heat sink at contact areas and thereby extend into the heat sink by at least 30 percent of the thru-thickness of the heat sink.

Abstract: A surface finishing and coating methodology that provides a superior looking aluminum product with acceptable corrosion performance for outdoor use. In one embodiment, a coating of high purity aluminum is applied first to an aluminum article or product via cold or thermal spray and the mechanical surface modification (e.g., polishing, buffing, brushing, etc.) is clone second. The resulting product has the desirable light weight and mechanical properties of aluminum with the chosen look and performance of the high purity aluminum coating. The aluminum product to be coated may be obtained by extrusion, forging, casting, or rolling.

Abstract: Embodiments of apparatuses, articles, methods, and systems for providing and/or using speculatively allocated bandwidth are generally described herein. Other embodiments may be described and claimed.

Abstract: Systems, apparatuses, and methods for searching for a match to a sequence of bits. The systems apparatuses, and methods include selecting a sequence of bits from a data stream, taking a function of the sequence of bits having a result that is a pattern that is represented by shorter string of bits, and comparing the resulting pattern to a predefined pattern to determine whether the resulting pattern matches the predefined pattern.