Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.

Abstract: The present invention relates to a reciprocating seal used, for example, for a shock absorber. A main seal lip 32 has a two-step lip structure including a first lip 32a and a second lip 32b and a plurality of protrusions 34 extending in the direction of the shaft are formed on a sliding contact surface of the second lip 32b, thereby improving frictional force characteristics and, at the same time, improving sealing performance.

Abstract: A high performance sealing device having an excellent pressure resistance and realizing a prevention of damage. The sealing device usable at a working pressure of 0 to 2 MPa, and not damaged. even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side H is sealed by a first seal part 2, oil from a cam side on a low pressure side L is sealed by a second seal part 3, and the fuel slightly leaked due to failure of scraping at the first seal part is sealed by the second seal part to form a dual seal structure, and a resin ring 21 coming into slidable sealing contact with a shaft 10 is used in the first seal part 2, whereby abnormal abrasion does not occur even when fuel having less lubricity is used, and the durability of the seal is increased.

Abstract: An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.

Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.

Abstract: A semiconductor integrated circuit including one or a plurality of external functional blocks; a nonvolatile memory having a logical content as to whether to validate or invalidate the external functional blocks; and a logical circuit validating or invalidating an input and an output to each external functional block in accordance with the logical content of the memory, wherein a user is allowed to validate use of a necessary external functional block and to invalidate use of an unnecessary external functional block.

Abstract: A high performance sealing device having an excellent pressure resistance and realizing a prevention of damage. The sealing device usable at a working pressure of 0 to 2 MPa, and not damaged even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side H is sealed by a first seal part 2, oil from a cam side on a low pressure side L is sealed by a second seal part 3, and the fuel slightly leaked due to failure of scraping at the first seal part is sealed by the second seal part to form a dual seal structure, and a resin ring 21 coming into slidable sealing contact with a shaft 10 is used in the first seal part 2, whereby abnormal abrasion does not occur even when fuel having less lubricity is used, and the durability of the seal is increased.

Abstract: A first comparator outputs a first signal indicative that a voltage determined according to the amount of charge stored in a first capacitor has reached a first reference voltage. A second comparator outputs a second signal indicative that a voltage determined according to the amount of charge stored in a second capacitor has reached a second reference voltage. An RS flip flop circuit is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal. When the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and the second capacitor is in a discharge state. When the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state, and the second capacitor is in a charge state.

Abstract: A high performance sealing device having an excellent pressure resistance and realizing a prevention of damage. The sealing device usable at a working pressure of 0 to 2 MPa, and not damaged even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side H is sealed by a first seal part 2, oil from a cam side on a low pressure side L is sealed by a second seal part 3, and the fuel slightly leaked due to failure of scraping at the first seal part is sealed by the second seal part to form a dual seal structure, and a resin ring 21 coming into slidable sealing contact with a shaft 10 is used in the first seal part 2, whereby abnormal abrasion does not occur even when fuel having less lubricity is used, and the durability of the seal is increased.

Abstract: An analog-digital converter includes an analog switch on a semiconductor substrate, the analog switch having a P-channel transistor and an N-channel transistor; and a capacitive element having a first electrode and a second electrode. The first electrode and the second electrode are formed in a region in a layer different from a layer of the analog switch, the region extending over the analog switch. The first electrode and the second electrode have a comb-shaped pattern different from an arrangement pattern of the source regions and the drain regions of the P-channel transistor and the N-channel transistor.

Abstract: The present invention relates to a reciprocating seal used, for example, for a shock absorber. A main seal lip 32 has a two-step lip structure including a first lip 32a and a second lip 32b and a plurality of protrusions 34 extending in the direction of the shaft are formed on sliding contact surface of the second lip 32b, thereby improving frictional force characteristics and, at the same time, improving sealing performance.

Abstract: A high performance sealing device (1) having an excellent pressure resistance, usable at a working pressure of 0 to 2 MPa, and not damaged even if the pressure of high-pressure fuel of 5 MPa or higher is applied thereto, wherein high pressure fuel on the high pressure side (H) is sealed by a first seal part (2), oil from a cam side on a low pressure side (L) is sealed by a second seal part (3), and the fuel slightly leaked through the first seal part (2) is sealed by the second seal part (3) to form a double seal structure, and a resin ring (21) slidably and sealingly coming into contact with a shaft (10) is used in the first seal part (2), whereby abnormal wear does not occur even if fuel with poor lubrication is used, and the durability of the seal is increased.

Abstract: A data processor includes first and second devices that are coupled together via a signal path. The first device includes a first arithmetic unit. The first arithmetic unit performs an arithmetic operation on data to obtain a first result during an operation cycle, in which the first device transfers the data to the second device through the signal path. The first arithmetic unit outputs the first result onto the signal path during an idle cycle in which no data is transferred through the signal path. The second device includes second arithmetic unit and comparator. The second arithmetic unit performs the same type of arithmetic operation on the data, transferred through the signal path in the operation cycle, to obtain a second result. The comparator compares the first result, transferred through the signal path in the idle cycle, to the second result and outputs a comparison result.

Abstract: A semiconductor integrated circuit including one or a plurality of external functional blocks; a nonvolatile memory having a logical content as to whether to validate or invalidate the external functional blocks; and a logical circuit validating or invalidating an input and an output to each external functional block in accordance with the logical content of the memory, wherein a user is allowed to validate use of a necessary external functional block and to invalidate use of an unnecessary external functional block.

Abstract: A semiconductor integrated circuit including one or a plurality of external functional blocks; a nonvolatile memory having a logical content as to whether to validate or invalidate the external functional blocks; and a logical circuit validating or invalidating an input and an output to each external functional block in accordance with the logical content of the memory, wherein a user is allowed to validate use of a necessary external functional block and to invalidate use of an unnecessary external functional block.

Abstract: A semiconductor integrated circuit including one or a plurality of external functional blocks; a nonvolatile memory having a logical content as to whether to validate or invalidate the external functional blocks; and a logical circuit validating or invalidating an input and an output to each external functional block in accordance with the logical content of the memory, wherein a user is allowed to validate use of a necessary external functional block and to invalidate use of an unnecessary external functional block.

Abstract: A data processor includes first and second devices that are coupled together via a signal path. The first device includes a first arithmetic unit. The first arithmetic unit performs an arithmetic operation on data to obtain a first result during an operation cycle, in which the first device transfers the data to the second device through the signal path. The first arithmetic unit outputs the first result onto the signal path during an idle cycle in which no data is transferred through the signal path. The second device includes second arithmetic unit and comparator. The second arithmetic unit performs the same type of arithmetic operation on the data, transferred through the signal path in the operation cycle, to obtain a second result. The comparator compares the first result, transferred through the signal path in the idle cycle, to the second result and outputs a comparison result.

Abstract: The present invention reduces crosstalk, which occurs as a result of interference between signals running in each of respective wiring layers of a first semiconductor chip and a second semiconductor chip stacked surface to surface with a small gap. The semiconductor device includes a first semiconductor chip 1 having a first electrode pad 2 and a first wiring layer 9 in the main surface, and a second semiconductor chip 5 having a second electrode pad 6 and a second wiring layer 10 in the main surface confronting the first semiconductor chip. A bump 4 is provided for electrically coupling the first electrode pad 2 and the second electrode pad 6 together. An insulation layer 8 is disposed between the main surfaces of first semiconductor chip 1 and second semiconductor chip 5. An electro-conductive layer 7 is disposed between the main confronting surfaces of the first semiconductor chip and the second semiconductor chip.

Abstract: The main surface of a first semiconductor chip having a first functional element is formed with first testing electrodes for testing the electrical characteristics of the first functional element and first connecting electrodes electrically connected to the first functional element. The main surface of a second semiconductor chip having a second functional element is formed with second testing electrodes for testing the electrical characteristics of the second functional element and second connecting electrodes electrically connected to the second functional element. The first semiconductor chip and the second semiconductor chip are integrated by using an insulating resin, with first bumps formed on the first connecting electrodes being bonded to third bumps formed on the second connecting electrodes.

Abstract: A microcomputer chip is formed with a CPU core, a peripheral circuit, a built-in ROM, and a built-in RAM. An emulation functional chip is formed with an emulation control circuit for controlling the whole process of emulation. First electrode pads formed on the functional surface of the microcomputer chip are electrically interconnected to second electrode pads formed on the functional surface of the emulation functional chip with connecting bumps interposed therebetween. The microcomputer chip and the emulation functional chip are modularized using an insulating resin with the first electrode pads being connected to the second electrode pads.