Abstract: The present invention relates to an integrated Doherty type amplifier arrangement and an amplifying method for such an arrangement, wherein a lumped element hybrid power divider (12) is provided for splitting input signals of main and peak amplifier stages (20, 30, 40) at predetermined phase shifts and non-equal division rates and at least one wideband lumped element artificial line (Z 1, Z2) combined with wideband compensation circuit for receiving said first amplified signal and for applying said predetermined phase shift to said first amplified signal and its higher harmonics. Thereby, the low gain of the peak amplifier is compensated by providing the non-equal power splitting at the input. Moreover, the use of the lumped element hybrid power divider leads to an improved isolation between the input ports of the main and peak amplifiers decreasing final distortions of the output signal.

Abstract: An integrated Doherty amplifier structure comprises an input bond pad (IBP), and an output bond pad (OBP). A first transistor (T1) forms the peak amplifier stage of the Doherty amplifier and has a control input (G1) to receive a first input signal (IS1) being an input signal of the Doherty amplifier, and has an output (D1) to supply an amplified first input signal (OS1) at an output of the Doherty amplifier A second transistor (T2) forms a main amplifier stage of the Doherty amplifier and has a control input (G2) to receive a second input signal (IS2) and has an output (D2) to supply an amplified second input signal (0S2). The first input signal (IS1) and the second input signal (IS2) have a 90° phase offset. A first bond wire (BW1) forms a first inductance (L1), and extends in a first direction, and is arranged between the input bond pad (IBP) and the control input (G1) of the first transistor (T1).

Abstract: An integrated HF-amplifÊer structure comprises in a first direction (FD) in the order mentioned: an input bond pad (IBP), a plurality of cells (CE1, CE2) being displaced with respect to each other in the first direction (FD), and an output bond pad (OBP). Each one of the cells (CE1, CE2) comprises an amplifier having an input pad (GP1, GP2), an active area (A1, A2), and an output pad (DP1, DP2). The active area (A1, A2) is arranged in-between the input pad (GP1, GP2) and the output pad (DP1, DP2), and the input pad (GP1, GP2), the active area (A1, A2), and the output pad (DP1, DP2) are displaced with respect to each other in a second direction (SD) substantially perpendicular to the first direction (FD). A first network (N1) comprises first interconnecting means (Li, Ci; Li1, Li2, Ci1) to interconnect input pads (GP1, GP2) of adjacent ones of the plurality of cells (CE1, CE2), and extends in the first direction (FD).

Abstract: A high frequency power device (100) is described comprising a high frequency power transistor (102) having a first main electrode, a second main electrode acting as output electrode and a control electrode, and an output compensation circuit (104) for compensating parasitic output capacitance of the transistor (102). The output compensation circuit is physically positioned relative to the transistor such that a shorter bond wire between the output electrode of the transistor and an output lead of the high frequency power device is obtained. The output compensation circuit (104) therefore is physically located in between an input lead (108) of the high frequency power device (100) and the transistor (102). The inductance introduced by the bond wire Lcomp from the output compensation circuit (104) to the output electrode of the transistor (102) can be used as a feedback signal.

Abstract: A method for a predistortion linearization of a branched signal for a RF amplifier, comprising supplying a branched signal to at least one input terminal (2); distributing power of the input signal present on at least one input terminal (2) to a plurality of parallel branch-circuits (16, 18, 20) as a branched signals by a power distributing circuit (4); controlling a phase parameter and an amplitude parameter of the branched signals by at least one nonlinear branch-circuit (18, 20); controlling a phase parameter and an amplitude parameter of the branched signals by at least one linear branch-circuit (16); combining output branched signals of at least one nonlinear branch circuit (18, 20) with the output branched signals of at least one linear branch circuit (16) by a power combining circuit (12); providing an output branched signal of the power combining circuit (12) on at least one output terminal (14).

Abstract: A high power Doherty amplifier circuit having at least one input terminal and at least one output terminal comprising at least one carrier transistor (30) forming a main amplifier stage; at least one peak transistor (32) forming a peak amplifier stage; a first input line (27) connecting the input terminal (28) to an input (29) of the carrier transistor (30); a second input line (31) connecting the input terminal (28) to an input (63) of the peak transistor (32); a first output line (33) connecting the output terminal (56) to an output (49) of the carrier transistor (30); and a second output line (35) connecting the output terminal (56) to an output (75) of the peak transistor (32).

Abstract: The power amplifier device comprises one or more transistors (16) with an output electrode and on top of that a thin-film capacitor. The capacitor comprises a first conductive layer (18), that is also the output terminal of the transistor. It further comprises a first dielectric layer (20) and a second conductive layer (22), that is connected by at least one first connecting wire (30) to said first conductive layer (18). A second connecting wire (34) connects said second conductive layer (22) to an output terminal of the power amplification device (40). In this manner a parallel LC circuit is created, and it is designed such that said parallel LC circuit shows resonance at a harmonic of a frequency (2Fo, 3Fo, 4Fo, 5Fo and so on) amplified by said power amplifier.

Abstract: An output circuit for a semiconductor amplifier element having an output capacitance (20, 42) that is to be cancelled by a first LC circuit having a first inductance (22, 44) and a first capacitance (24, 46), said output circuit comprising an additional inductance circuit with an additional inductance (30, 52) and an additional capacitance (32, 54), said first inductance circuit and said additional inductance circuit compensating for the output capacitance (20, 42) of the semiconductor amplifier element, while the first inductance (22, 44) and the first capacitance (24, 46) cancel out the second harmonics within the output signal of the semiconductor amplifier element.