Patents by Inventor Ikuhiro Yamaguchi

Ikuhiro Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8362980
    Abstract: A display device includes a display panel having a plurality of signal lines and scanning lines with a plurality of display pixels containing current control type light emitting devices; a scan driver circuit which applies a scanning signal to each of the scanning lines and sets the display pixels connected to the scanning lines in a selective state; a signal driver circuit which generates gradation current based on a display data luminosity gradation component and supplies to the display pixels set in the selective state; a precharge circuit which applies a precharge voltage to each signal line and sets a capacity component attached to each of the scanning lines in a predetermined charged state; and an operation control circuit which controls setting of the light emitting devices in a non-light emitting state when the capacity component is set in a predetermined charged state.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: January 29, 2013
    Assignee: Casio Computer Co., Ltd.
    Inventors: Manabu Takei, Tomoyuki Shirasaki, Ikuhiro Yamaguchi, Tsuyoshi Ozaki, Jun Ogura
  • Patent number: 8178828
    Abstract: A photo-sensing device is disclosed, comprising a photoelectric conversion semiconductor thin film, thin films for ohmic contacts to be provided to form an incident light window on one face of the photoelectric conversion semiconductor thin film, first and second ohmic electrodes installed on the thin films for the ohmic contacts, a connection wiring for short-circuiting the first and the second ohmic electrodes, an insulating film provided on the other face of the photoelectric conversion semiconductor thin film, and a first electrode provided on the face of the insulating film that does not contact the photoelectric conversion semiconductor thin film.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: May 15, 2012
    Assignee: Casio Computer Co., Ltd.
    Inventor: Ikuhiro Yamaguchi
  • Publication number: 20110175886
    Abstract: A display element drive circuit includes a first circuit which holds as a voltage component electric charges based on a gradation signal corresponding to display data, a second circuit which supplies the gradation signal to the electric charge holding circuit at a timing of application of a selection signal, current control type display elements, and a third circuit which generates a driving current based on the voltage component held in the first circuit and supplies the generated driving current to the display element. One of the second and third circuits includes at least one field effect transistor. The field effect transistor includes gate, source and drain electrodes, and a source-side parasitic capacitance formed between the gate and source electrodes and a drain-side parasitic capacitance formed between the gate and drain electrodes of the field effect transistor have different capacitance values.
    Type: Application
    Filed: March 29, 2011
    Publication date: July 21, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Ikuhiro YAMAGUCHI, Manabu Takei
  • Publication number: 20110115761
    Abstract: A display device includes a display panel having a plurality of signal lines and scanning lines with a plurality of display pixels containing current control type light emitting devices; a scan driver circuit which applies a scanning signal to each of the scanning lines and sets the display pixels connected to the scanning lines in a selective state; a signal driver circuit which generates gradation current based on a display data luminosity gradation component and supplies to the display pixels set in the selective state; a precharge circuit which applies a precharge voltage to each signal line and sets a capacity component attached to each of the scanning lines in a predetermined charged state; and an operation control circuit which controls setting of the light emitting devices in a non-light emitting state when the capacity component is set in a predetermined charged state.
    Type: Application
    Filed: January 20, 2011
    Publication date: May 19, 2011
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Manabu TAKEI, Tomoyuki Shirasaki, Ikuhiro Yamaguchi, Tsuyoshi Ozaki, Jun Ogura
  • Patent number: 7928932
    Abstract: A display element drive circuit includes a first circuit which holds as a voltage component electric charges based on a gradation signal corresponding to display data, a second circuit which supplies the gradation signal to the electric charge holding circuit at a timing of application of a selection signal, current control type display elements, and a third circuit which generates a driving current based on the voltage component held in the first circuit and supplies the generated driving current to the display element. One of the second and third circuits includes at least one field effect transistor. The field effect transistor includes gate, source and drain electrodes, and a source-side parasitic capacitance formed between the gate and source electrodes and a drain-side parasitic capacitance formed between the gate and drain electrodes of the field effect transistor have different capacitance values.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: April 19, 2011
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Manabu Takei
  • Patent number: 7898507
    Abstract: A display device which displays image information based on display data comprising a display panel having a plurality of signal lines and scanning lines with a plurality of display pixels containing current control type light emitting devices; a scan driver circuit applies a scanning signal to each of the scanning lines and sets the display pixels connected to the scanning lines in a selective state; a signal driver circuit generates gradation current based on the display data luminosity gradation component and supplies to the display pixels set in the selective state; a precharge circuit applies a precharge voltage to each signal line and sets a capacity component attached to each of the scanning lines in a predetermined charged state; and an operation control circuit controls setting of the light emitting devices in a non-light emitting state when the capacity component is set in a predetermined charged state.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: March 1, 2011
    Assignee: Casio Computer Co., Ltd.
    Inventors: Manabu Takei, Tomoyuki Shirasaki, Ikuhiro Yamaguchi, Tsuyoshi Ozaki, Jun Ogura
  • Patent number: 7851836
    Abstract: A photosensor includes a semiconductor thin film for photoelectric conversion having a first side portion and a second side portion. A source electrode extends in the longitudinal direction of the semiconductor thin film and has a side edge portion that overlaps the first side portion of the semiconductor thin film, and a drain electrode extends in the longitudinal direction and has a side edge portion that overlaps the second side portion of the semiconductor thin film. At least one of the side edge portions of the source and drain electrodes has protruding portions which are arranged along the longitudinal direction and which overlap the semiconductor thin film, and notched portions formed between the protruding portions. An ohmic contact layer is formed between the semiconductor thin film and the protruding portions of the at least one of the side edge portions of the source and drain electrodes.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: December 14, 2010
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiroshi Matsumoto, Ikuhiro Yamaguchi, Hirokazu Kobayashi
  • Patent number: 7795621
    Abstract: A thin film transistor panel including: a transparent substrate; scanning lines made of a light blocking electroconductive material to be formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines and made of a light blocking electroconductive material; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data lines, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover at least a part of the gate electrode of each of the thin film transistors.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: September 14, 2010
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Manabu Takei, Motohiko Yoshida
  • Patent number: 7733320
    Abstract: A shift register circuit includes a plurality of cascade-connected signal holding circuits each of the signal holding circuits includes an input control circuit to which an input signal is applied, and which fetches and holds the input signal, an output control circuit to which a first control clock signal is applied, and which outputs an output signal corresponding to timings of the held input signal and the first control clock signal, and a reset control circuit to which a reset signal is applied, and which initializes a signal level of the input signal held in the input control circuit. A timing at which the output signal is terminated is set to be ahead of an application start timing of the reset signal.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: June 8, 2010
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Katsuhiko Morosawa
  • Publication number: 20090236504
    Abstract: A photo-sensing device is disclosed, comprising a photoelectric conversion semiconductor thin film, thin films for ohmic contacts to be provided to form an incident light window on one face of the photoelectric conversion semiconductor thin film, first and second ohmic electrodes installed on the thin films for the ohmic contacts, a connection wiring for short-circuiting the first and the second ohmic electrodes, an insulating film provided on the other face of the photoelectric conversion semiconductor thin film, and a first electrode provided on the face of the insulating film that does not contact the photoelectric conversion semiconductor thin film.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 24, 2009
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Ikuhiro YAMAGUCHI
  • Publication number: 20080157136
    Abstract: A photosensor includes a semiconductor thin film for photoelectric conversion having a first side portion and a second side portion. A source electrode extends in the longitudinal direction of the semiconductor thin film and has a side edge portion that overlaps the first side portion of the semiconductor thin film, and a drain electrode extends in the longitudinal direction and has a side edge portion that overlaps the second side portion of the semiconductor thin film. At least one of the side edge portions of the source and drain electrodes has protruding portions which are arranged along the longitudinal direction and which overlap the semiconductor thin film, and notched portions formed between the protruding portions. An ohmic contact layer is formed between the semiconductor thin film and the protruding portions of the at least one of the side edge portions of the source and drain electrodes.
    Type: Application
    Filed: December 20, 2007
    Publication date: July 3, 2008
    Applicant: Casio Computer Co., Ltd.
    Inventors: Hiroshi Matsumoto, Ikuhiro Yamaguchi, Hirokazu Kobayashi
  • Patent number: 7385224
    Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: June 10, 2008
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
  • Publication number: 20060210012
    Abstract: A shift register circuit includes a plurality of cascade-connected signal holding circuits each of the signal holding circuits includes an input control circuit to which an input signal is applied, and which fetches and holds the input signal, an output control circuit to which a first control clock signal is applied, and which outputs an output signal corresponding to timings of the held input signal and the first control clock signal, and a reset control circuit to which a reset signal is applied, and which initializes a signal level of the input signal held in the input control circuit. A timing at which the output signal is terminated is set to be ahead of an application start timing of the reset signal.
    Type: Application
    Filed: March 9, 2006
    Publication date: September 21, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Katsuhiko Morosawa
  • Publication number: 20060192204
    Abstract: A thin film transistor panel including: a transparent substrate; scanning lines made of a light blocking electroconductive material to be formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines and made of a light blocking electroconductive material; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data lines, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover at least a part of the gate electrode of each of the thin film transistors.
    Type: Application
    Filed: February 16, 2006
    Publication date: August 31, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Manabu Takei, Motohiko Yoshida
  • Publication number: 20060066644
    Abstract: A display element drive circuit includes a first circuit which holds as a voltage component electric charges based on a gradation signal corresponding to display data, a second circuit which supplies the gradation signal to the electric charge holding circuit at a timing of application of a selection signal, current control type display elements, and a third circuit which generates a driving current based on the voltage component held in the first circuit and supplies the generated driving current to the display element. One of the second and third circuits includes at least one field effect transistor. The field effect transistor includes gate, electrode and drain electrodes, and a source-side parasitic capacitance formed between the gate and source electrodes and a drain-side parasitic capacitance formed between the gate and drain electrodes of the field effect transistor have different capacitance values.
    Type: Application
    Filed: September 26, 2005
    Publication date: March 30, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Manabu Takei
  • Publication number: 20060061526
    Abstract: A drive circuit which drives an optical element in accordance with a gradation signal corresponding to display data includes an electric charge holding circuit which holds electric charges based on the gradation signal as a voltage component, and a driving current control circuit which generates a driving current based on the voltage component held in the electric charge holding circuit and supplies the generated driving current to the optical element. The driving current control circuit has at least one double-gate type thin film transistor. The transistor includes a semiconductor layer, a first gate electrode provided above the semiconductor layer, a second gate electrode provided below the semiconductor layer, and a source and drain electrodes provided on both end portion sides of the semiconductor layer.
    Type: Application
    Filed: September 16, 2005
    Publication date: March 23, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Tomoyuki Shirasaki, Ikuhiro Yamaguchi, Manabu Takei
  • Publication number: 20060043447
    Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
    Type: Application
    Filed: September 1, 2005
    Publication date: March 2, 2006
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
  • Publication number: 20050280613
    Abstract: A display device which displays image information based on display data comprising a display panel having a plurality of signal lines and scanning lines with a plurality of display pixels containing current control type light emitting devices; a scan driver circuit applies a scanning signal to each of the scanning lines and sets the display pixels connected to the scanning lines in a selective state; a signal driver circuit generates gradation current based on the display data luminosity gradation component and supplies to the display pixels set in the selective state; a precharge circuit applies a precharge voltage to each signal line and sets a capacity component attached to each of the scanning lines in a predetermined charged state; and an operation control circuit controls setting of the light emitting devices in a non-light emitting state when the capacity component is set in a predetermined charged state.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 22, 2005
    Applicant: Casio Computer Co., Ltd.
    Inventors: Manabu Takei, Tomoyuki Shirasaki, Ikuhiro Yamaguchi, Tsuyoshi Ozaki, Jun Ogura
  • Publication number: 20050270259
    Abstract: A display device includes a substrate, and a light-emitting element which is provided on one side of the substrate. A pixel circuit is provided on the side of the substrate, and has at least one electrode to drive the light-emitting element. An interconnection is provided on the side of substrate, is electrically connected to the pixel circuit and has a conductive layer different from the electrode of the pixel circuit.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 8, 2005
    Applicant: Casio Computer Co., Ltd.
    Inventors: Tomoyuki Shirasaki, Tadahisa Tohyama, Manabu Takei, Jun Ogura, Ikuhiro Yamaguchi, Tsuyoshi Ozaki
  • Patent number: 6377322
    Abstract: Each pair of gate lines GL are arranged aside a corresponding one of rows of pixel electrodes arranged in a matrix form, so as to sandwich pixel electrodes in the direction of columns, whereas each pair of TFTs are arranged to a sandwich corresponding one of the pixel electrodes, and each of data lines DL is arranged aside a corresponding one of columns of pixel electrodes. TFTs are connected to the pixel electrodes and to the gate lines GL so that the pixel electrodes of one row are selected when two of the gate lines GL sandwiching the pixel electrodes are selected. An end of a current path of each TFT is connected to the data line DL. When a pair of TFTs sandwiching one pixel electrode are simultaneously turned on, large current is supplied to the pixel electrode through the data line DL. Source electrode of TFT and source electrode of its proximate (adjacent) thin film transistor are formed by pattering the same metal layer, and share one current path connected to the data line DL.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: April 23, 2002
    Assignee: Casio Computer Co., Ltd.
    Inventors: Ikuhiro Yamaguchi, Hiromitsu Ishii