Abstract: A multilayer electronic component include a first non-conductive resin layer, extending between a conductive resin layer and an electrode layer of a first external electrode, and a second non-conductive resin layer extending between a conductive resin layer and an electrode layer of a second external electrode. The first non-conductive layer and the second non-conductive layer may be spaced apart from each other to suppress arc discharge and to improve bending strength.

Abstract: A wireless communication method and apparatus in a wireless local area network (WLAN) system are disclosed. A wireless communication method according to one embodiment may include generating a high-efficiency Wi-Fi (HEW) frame including at least one of an HEW-SIG-A field and an HEW-SIG-B field which include channel information for communications according to an Orthogonal Frequency-Division Multiple Access (OFDMA) mode, and transmitting the generated HEW frame to a reception apparatus.

Abstract: A multilayer electronic component include a first non-conductive resin layer, extending between a conductive resin layer and an electrode layer of a first external electrode, and a second non-conductive resin layer extending between a conductive resin layer and an electrode layer of a second external electrode. The first non-conductive layer and the second non-conductive layer may be spaced apart from each other to suppress arc discharge and to improve bending strength.

Abstract: A multilayer capacitor includes a capacitor body including first to six surfaces, and including a dielectric layer, first and second internal electrodes, and first and second external electrodes. The first and second external electrodes include first and second sintered layers, and first and second plating layers, respectively. An insulating layer is disposed on the capacitor body, to cover an end portion of a first band portion of the first sintered layer and an end portion of a second band portion of the second sintered layer, and has a maximum thickness of 10 ?m or more. A portion of the first band portion of the first sintered layer is exposed from the insulating layer. A portion of the second band portion of the second sintered layer is exposed from the insulating layer.

Abstract: Disclosed are a frame transmission method and a communication device performing the same. The communication device transmits a null data packet (NDP)-announcement (NDP-A) including information on a plurality of communication devices participating in interference alignment and transmits an NDP including a common signal field and a common training field commonly applied to the plurality of communication devices.

Abstract: A multilayer electronic component has a body and a non-conductive resin layer. The non-conductive resin layer includes a body cover portion disposed in a region of an external surface of the body in which an electrode layer of an external electrode is not disposed, and an extending portion extending from the body cover portion between the electrode layer and a conductive resin layer of the external electrode, to thereby suppress arc discharge, improve bending strength, and improve moisture resistance.

Abstract: A multilayer electronic component has a body and a non-conductive resin layer. The non-conductive resin layer includes a body cover portion disposed in a region of an external surface of the body in which an electrode layer of an external electrode is not disposed, and an extending portion extending from the body cover portion between the electrode layer and a conductive resin layer of the external electrode, to thereby suppress arc discharge, improve bending strength, and improve moisture resistance.

Abstract: A multilayer electronic component includes: a body including dielectric layers and internal electrodes disposed alternately with the dielectric layers; and external electrodes disposed on the body, wherein each of the external electrodes includes: an electrode layer connected to the internal electrodes; a first intermetallic compound layer disposed on the electrode layer and including Cu3Sn; a second intermetallic compound layer disposed on the first intermetallic compound layer and including Cu6Sn5; and a conductive resin layer disposed on the second intermetallic compound layer and including a conductive connection portion including a low melting point metal, a plurality of metal particles, and a base resin, and an average thickness of the first intermetallic compound layer is 0.5 to 2.5 ?m.

Abstract: A multilayer capacitor includes a capacitor body including first to six surfaces, and including a dielectric layer, first and second internal electrodes, and first and second external electrodes. The first and second external electrodes include first and second sintered layers, and first and second plating layers, respectively. An insulating layer is disposed on the capacitor body, to cover an end portion of a first band portion of the first sintered layer and an end portion of a second band portion of the second sintered layer, and has a maximum thickness of 10 ?m or more. A portion of the first band portion of the first sintered layer is exposed from the insulating layer. A portion of the second band portion of the second sintered layer is exposed from the insulating layer.

Abstract: A multilayer electronic component include a first non-conductive resin layer, extending between a conductive resin layer and an electrode layer of a first external electrode, and a second non-conductive resin layer extending between a conductive resin layer and an electrode layer of a second external electrode. The first non-conductive layer and the second non-conductive layer may be spaced apart from each other to suppress arc discharge and to improve bending strength.

Abstract: A multilayer electronic component has a body and a non-conductive resin layer. The non-conductive resin layer includes a body cover portion disposed in a region of an external surface of the body in which an electrode layer of an external electrode is not disposed, and an extending portion extending from the body cover portion between the electrode layer and a conductive resin layer of the external electrode, to thereby suppress arc discharge, improve bending strength, and improve moisture resistance.

Abstract: A thin-film ceramic capacitor includes a body in which dielectric layers and first and second electrode layers are alternately disposed on a substrate, and first and second electrode pads disposed on external surfaces of the body. A plurality of vias are disposed in the body. Each of a plurality of first vias connects the first electrode layers and the first electrode pad to each other. Each of a plurality of second vias connects the second electrode layers and the second electrode pad to each other. A separation slit is disposed to penetrate from an upper surface of the body and extend to the substrate, and the pluralities of first and second vias are disposed symmetrically with respect to the separation slit.

Abstract: A thin-film ceramic capacitor includes a body in which dielectric layers and first and second electrode layers are alternately disposed on a substrate, and first and second electrode pads disposed on external surfaces of the body. A plurality of vias are disposed in the body. Each of a plurality of first vias connects the first electrode layers and the first electrode pad to each other. Each of a plurality of second vias connects the second electrode layers and the second electrode pad to each other. A separation slit is disposed to penetrate from an upper surface of the body and extend to the substrate, and the pluralities of first and second vias are disposed symmetrically with respect to the separation slit.

Abstract: A thin-film ceramic capacitor includes a body in which dielectric layers and first and second electrode layers are alternately disposed on a substrate, and first and second electrode pads disposed on external surfaces of the body. A plurality of vias are disposed in the body. Each of a plurality of first vias connects the first electrode layers and the first electrode pad to each other. Each of a plurality of second vias connects the second electrode layers and the second electrode pad to each other. A separation slit is disposed to penetrate from an upper surface of the body and extend to the substrate, and the pluralities of first and second vias are disposed symmetrically with respect to the separation slit.

Abstract: A capacitor includes a plurality of cells each including a capacitance formation portion in which a plurality of trenches are positioned and a margin portion disposed around the capacitance formation portion. The cell includes three or more dielectric layers disposed in the capacitance formation portion and extending in the trenches, and three or more electrode layers sequentially stacked with dielectric layers interposed therebetween and extending in the trenches. At least first and second electrode layers have opposite polarities and each include a lead electrode extending from the capacitance formation portion to the margin portion. A lead electrode of the first electrode layer is disposed in a first region disposed to one side of a central portion of a cell, and a lead electrode of the second electrode layer is disposed in a second region disposed on another side of a central portion of the cell.

Abstract: A capacitor includes: a substrate including a plurality of trenches and a capacitance formation portion, and a margin portion disposed around the capacitance formation portion; dielectric layers disposed on one surface of the substrate and filling the trenches; a plurality of first electrode layers each disposed on one surface of the dielectric layer and each including a first lead portion led out from the capacitance formation portion to the margin portion; and a plurality of second electrode layers each disposed on one surface of the dielectric layer to face the first electrode layer with each of the dielectric layers interposed therebetween, and each including a second lead portion led out from the capacitance formation portion to the margin portion, wherein the first and second lead portions of the plurality of first and second electrode layers are stacked in a stepped shape inclined in a direction from the margin portion to the capacitance formation portion.

Abstract: A capacitor includes a plurality of cells each including a capacitance formation portion in which a plurality of trenches are positioned and a margin portion disposed around the capacitance formation portion. The cell includes three or more dielectric layers disposed in the capacitance formation portion and extending in the trenches, and three or more electrode layers sequentially stacked with dielectric layers interposed therebetween and extending in the trenches. At least first and second electrode layers have opposite polarities and each include a lead electrode extending from the capacitance formation portion to the margin portion. A lead electrode of the first electrode layer is disposed in a first region disposed to one side of a central portion of a cell, and a lead electrode of the second electrode layer is disposed in a second region disposed on another side of a central portion of the cell.

Abstract: A capacitor includes: a substrate including a plurality of trenches and a capacitance formation portion, and a margin portion disposed around the capacitance formation portion; dielectric layers disposed on one surface of the substrate and filling the trenches; a plurality of first electrode layers each disposed on one surface of the dielectric layer and each including a first lead portion led out from the capacitance formation portion to the margin portion; and a plurality of second electrode layers each disposed on one surface of the dielectric layer to face the first electrode layer with each of the dielectric layers interposed therebetween, and each including a second lead portion led out from the capacitance formation portion to the margin portion, wherein the first and second lead portions of the plurality of first and second electrode layers are stacked in a stepped shape inclined in a direction from the margin portion to the capacitance formation portion.

Abstract: A thin-film ceramic capacitor includes a body in which dielectric layers and first and second electrode layers are alternately disposed on a substrate, and first and second electrode pads disposed on external surfaces of the body. A plurality of vias are disposed in the body. Each of a plurality of first vias connects the first electrode layers and the first electrode pad to each other. Each of a plurality of second vias connects the second electrode layers and the second electrode pad to each other. A separation slit is disposed to penetrate from an upper surface of the body and extend to the substrate, and the pluralities of first and second vias are disposed symmetrically with respect to the separation slit.