Abstract: Techniques are described that can be used to extend the data transmission rate specified by 10 GBASE-KR of IEEE 802.3ap (2007) to more than 10 Gb/s using a multiple lane backplane. A signal for transmission over 10 Gb/s can be divided into multiple streams for transmission over multiple lanes. Multiple transceiver pairs can be used for transmission and receipt of the multiple streams. Each transceiver pair may comply with 10 GBASE-KR of IEEE 802.3ap (2007).

Abstract: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header. Other embodiments are described and claimed.

Abstract: A method apparatus for hardware and software co-simulation in ASIC development includes developing hardware and software concurrently and co-simulating the hardware and software therebetween via a network while the hardware and software are being developed. The method and apparatus for hardware and software co-simulation allows the software development and testing of hardware and software to start with the design of hardware so as to reduce an overall system development cycle involving ASICs.

Abstract: A system and method to implement a dual speed network interface. A first code is transmitted from an initiator unit to a follower unit on a first output datapath (“OUT_DP”) of multiple OUT_DPs coupling the initiator unit to the follower unit. The first code is transmitted to initiate a speed change of a link to a physical medium for communicating data. The first code is transmitted at a first datapath speed. A second code is received on a first input datapath (“IN_DP”) of multiple IN_DPs coupling the follower unit to the initiator unit. The second code indicates to the initiator unit that the follower unit received the first code. The first OUT_DP is then placed into an idle state in response to receiving the second code. Subsequently, the first OUT_DP is enabled after the idle state at a second datapath speed different from the first datapath speed.

Abstract: An apparatus, system, and method to provide a dual speed bi-directional link between a media access control (“MAC”) unit and a physical (“PHY”) unit. The MAC unit controls access to a physical medium and the PHY unit couples to the physical medium. A bi-directional link couples first transmit data paths (“TXDPs”) and first receive data paths (“RXDPs”) of the MAC unit to second TXDPs and second RXDPs of the PHY unit. The MAC and PHY units configured to route data along all of the first and second TXDPs and RXDPs during fast speed operation and to route the data along one of the first and second TXDPs and one of the first and second RXDPs during the slow speed operation.

Abstract: Disclosed are a system, method and device for negotiating a data transmission mode over an attachment unit interface (DDI). A data transceiver circuit may be coupled to one or more data lanes of the DDI. A negotiation section may receive a link pulse signal on at least one data lane in the DDI during a negotiation period and selectively configure the data transceiver to transmit and receive data on one or more data lanes according to a data transmission mode based upon the received link pulse signal.