Abstract: A method of operating a computing device includes performing a pre-boot memory test on a memory by a BIOS (Basic Input/Output System), recording, in a log, memory fail information generated as a result of performing the pre-boot memory test by the BIOS, and performing a page offline operation using the memory fail information, after an operating system (OS) of the computing device is installed.

Abstract: A heat sink plate includes a first layer made of copper (Cu) or a copper (Cu) alloy, a second layer formed on the first layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), a third layer formed on the second layer and made of copper (Cu) or a copper (Cu) alloy, a fourth layer formed on the third layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), and a fifth layer formed on the fourth layer and made of copper (Cu) or a copper (Cu) alloy.

Abstract: A semiconductor package includes a chip stack having a plurality of semiconductor chips vertically stacked on a package substrate. A stress-equalizing chip is disposed on the chip stack, the stress-equalizing chip providing means to reduce the variation in the electrical characteristics of the plurality of semiconductor chips. An encapsulant is disposed on the package substrate and is configured to cover at least a portion of the chip stack. Each of the plurality of semiconductor chips is electrically connected to the package substrate. The stress-equalizing chip is not electrically connected to the substrate or to the plurality of semiconductor chips.

Abstract: A heat sink plate includes a first layer made of copper (Cu) or a copper (Cu) alloy, a second layer formed on the first layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), a third layer formed on the second layer and made of copper (Cu) or a copper (Cu) alloy, a fourth layer formed on the third layer and made of molybdenum (Mo) or an alloy that includes copper (Cu) and one or more components selected from molybdenum (Mo), tungsten (W), carbon (C), chromium (Cr), titanium (Ti), and beryllium (Be), and a fifth layer formed on the fourth layer and made of copper (Cu) or a copper (Cu) alloy.

Abstract: A heat sink plate having a structure in which two or more kinds of materials are laminated, includes: a core layer in the thickness direction of the heat sink plate; and cover layers covering a top surface and a bottom surface of the core layer; wherein the cover layers comprise a material containing copper, wherein the core layer is formed of a matrix having a first thermal expansion coefficient and a plurality of layers extending in parallel along the thickness direction of the core layer in a lattice form in the matrix, wherein the plurality of layers are made of an alloy having a second thermal expansion coefficient.

Abstract: A semiconductor package includes a chip stack having a plurality of semiconductor chips vertically stacked on a package substrate. A stress-equalizing chip is disposed on the chip stack, the stress-equalizing chip providing means to reduce the variation in the electrical characteristics of the plurality of semiconductor chips. An encapsulant is disposed on the package substrate and is configured to cover at least a portion of the chip stack. Each of the plurality of semiconductor chips is electrically connected to the package substrate. The stress-equalizing chip is not electrically connected to the substrate or to the plurality of semiconductor chips.

Abstract: A heat sink plate having a structure in which two or more kinds of materials are laminated, includes: a core layer in the thickness direction of the heat sink plate; and cover layers covering a top surface and a bottom surface of the core layer; wherein the cover layers comprise a material containing copper, wherein the core layer is formed of a matrix having a first thermal expansion coefficient and a plurality of layers extending in parallel along the thickness direction of the core layer in a lattice form in the matrix, wherein the plurality of layers are made of an alloy having a second thermal expansion coefficient.

Abstract: Provided are a transparent display device and a method for controlling same. This transparent display device comprises: a sensor which measures the color properties of light that is incident to the transparent display device; a light control unit which is configured so as to control the amount of light that is incident to the rear surface of the transparent display unit and penetrates a plurality of penetration units; and a transparent display panel which comprises a control unit configured so as to correct color distortion by making a comparison with a preset threshold value on the basis of the measured color properties and correcting the image to be displayed on a plurality of pixels, the transparent display panel displaying the corrected input image.

Abstract: A heat-dissipating plate comprises a core layer; and two cover layers formed by being laminated on the top and bottom face of the core layer, wherein, the core layer is composed of a composite material in which a carbon phase is composited in a Cu matrix, the cover layer is composed of a Mo—Cu alloy, and the thermal conductivity in the thickness direction of the heat-dissipating plate is at least 300 W/mK, and the thermal expansion coefficient of the heat-dissipating plate in a direction perpendicular to the thickness direction is at most 9×10-6/K.

Abstract: Provided are a transparent display device and a method for controlling same. This transparent display device comprises: a sensor which measures the colour properties of light that is incident to the transparent display device; a light control unit which is configured so as to control the amount of light that is incident to the rear surface of the transparent display unit and penetrates a plurality of penetration units; and a transparent display panel which comprises a control unit configured so as to correct colour distortion by making a comparison with a preset threshold value on the basis of the measured colour properties and correcting the image to be displayed on a plurality of pixels, the transparent display panel displaying the corrected input image.

Abstract: A package stack includes a first package, a second package, first solder balls and a molding member. The first package includes a first package substrate, a first semiconductor chip on the first package substrate and connecting pads. The second package includes a second package substrate and a second semiconductor chip on the second package substrate. The second package is disposed over the first package. The first solder balls are in contact with the connecting pads and a bottom of a peripheral portion of the second package substrate. The molding member covers an upper surface of the second package substrate and the second semiconductor chip. A portion of the molding member overlapping the first solder balls has a thickness smaller than a thickness of another portion of the molding member.

Abstract: A package stack includes a first package, a second package, first solder balls and a molding member. The first package includes a first package substrate, a first semiconductor chip on the first package substrate and connecting pads. The second package includes a second package substrate and a second semiconductor chip on the second package substrate. The second package is disposed over the first package. The first solder balls are in contact with the connecting pads and a bottom of a peripheral portion of the second package substrate. The molding member covers an upper surface of the second package substrate and the second semiconductor chip. A portion of the molding member overlapping the first solder balls has a thickness smaller than a thickness of another portion of the molding member.