Patents by Inventor Ilia Ovsiannikov

Ilia Ovsiannikov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11620491
    Abstract: A processor includes a register, a non-zero weight value selector and a multiplier. The register holds a first group of weight values and a second group of weight values. Each group of weight values includes at least one weight value, and each weight value in the first group of weight values corresponding to a weight value in the second group of weight values. The non-zero weight value selector selects a non-zero weight value from a weight value in the first group of weight values or a non-zero weight value in the second group of weight values that corresponds to the weight value in the first group of weight values. The multiplier multiplies the selected non-zero weight value and an activation value that corresponds to the selected non-zero weight value to form an output product value.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: April 4, 2023
    Inventors: Lei Wang, Ilia Ovsiannikov
  • Patent number: 11621724
    Abstract: A data-sparsity homogenizer includes a plurality of multiplexers and a controller. The plurality of multiplexers receives 2N bit streams of non-homogenous sparse data in which the non-homogenous sparse data includes non-zero value data clumped together. The plurality of multiplexers is arranged in 2N rows and N columns. Each input of a multiplexer in a first column receives a respective bit stream of the 2N bit streams of non-homogenized sparse data, and the multiplexers in a last column output 2N bit streams of sparse data that is more homogenous than the non-homogenous sparse data of the 2N bit streams. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams of sparse data that is more homogeneous than the non-homogenous sparse data of the 2N bit streams.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: April 4, 2023
    Inventors: Ilia Ovsiannikov, Lei Wang
  • Patent number: 11593586
    Abstract: A client device configured with a neural network includes a processor, a memory, a user interface, a communications interface, a power supply and an input device, wherein the memory includes a trained neural network received from a server system that has trained and configured the neural network for the client device. A server system and a method of training a neural network are disclosed.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 28, 2023
    Inventors: Zhengping Ji, Ilia Ovsiannikov, Yibing Michelle Wang, Lilong Shi
  • Publication number: 20230047025
    Abstract: A multichannel data packer includes a plurality of two-input multiplexers and a controller. The plurality of two-input multiplexers is arranged in 2N rows and N columns in which N is an integer greater than 1. Each input of a multiplexer in a first column receives a respective bit stream of 2N channels of bit streams. Each respective bit stream includes a bit-stream length based on data in the bit stream. The multiplexers in a last column output 2N channels of packed bit streams each having a same bit-stream length. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams that each has the same bit-stream length.
    Type: Application
    Filed: October 19, 2022
    Publication date: February 16, 2023
    Inventors: Ilia OVSIANNIKOV, Ali SHAFIEE ARDESTANI, Lei WANG, Joseph H. HASSOUN
  • Patent number: 11579842
    Abstract: An N×N multiplier may include a N/2×N first multiplier, a N/2×N/2 second multiplier, and a N/2×N/2 third multiplier. The N×N multiplier receives two operands to multiply. The first, second and/or third multipliers are selectively disabled if an operand equals zero or has a small value. If the operands are both less than 2N/2, the second or the third multiplier are used to multiply the operands. If one operand is less than 2N/2 and the other operand is equal to or greater than 2N/2, the first multiplier is used or the second and third multipliers are used to multiply the operands. If both operands are equal to or greater than 2N/2, the first, second and third multipliers are used to multiply the operands.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: February 14, 2023
    Inventors: Ilia Ovsiannikov, Ali Shafiee Ardestani, Joseph Hassoun, Lei Wang
  • Patent number: 11551055
    Abstract: A processor includes a register, a non-zero weight value selector and a multiplier. The register holds a first group of weight values and a second group of weight values. Each group of weight values includes at least one weight value, and each weight value in the first group of weight values corresponding to a weight value in the second group of weight values. The non-zero weight value selector selects a non-zero weight value from a weight value in the first group of weight values or a non-zero weight value in the second group of weight values that corresponds to the weight value in the first group of weight values. The multiplier multiplies the selected non-zero weight value and an activation value that corresponds to the selected non-zero weight value to form an output product value.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: January 10, 2023
    Inventors: Lei Wang, Ilia Ovsiannikov
  • Publication number: 20230007175
    Abstract: Two-dimensional (2D) color information and 3D-depth information are concurrently obtained from a 2D pixel array. The 2D pixel array is arranged in a first group of a plurality of rows. A second group of rows of the array are operable to generate 2D-color information and pixels of a third group of the array are operable to generate 3D-depth information. The first group of rows comprises a first number of rows, the second group of rows comprises a second number of rows that is equal to or less than the first number of rows, and the third group of rows comprises a third number of rows that is equal to or less than the second number of rows. In an alternating manner, 2D-color information is received from a row selected from the second group of rows and 3D-depth information is received from a row selected from the third group of rows.
    Type: Application
    Filed: September 8, 2022
    Publication date: January 5, 2023
    Inventors: Ilia OVSIANNIKOV, Yibing Michelle WANG, Gregory WALIGORSKI, Qiang ZHANG
  • Publication number: 20220321819
    Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Yibing Michelle WANG, Ilia OVSIANNIKOV
  • Publication number: 20220292049
    Abstract: A system for calculating. A scratch memory is connected to a plurality of configurable processing elements by a communication fabric including a plurality of configurable nodes. The scratch memory sends out a plurality of streams of data words. Each data word is either a configuration word used to set the configuration of a node or of a processing element, or a data word carrying an operand or a result of a calculation. Each processing element performs operations according to its current configuration and returns the results to the communication fabric, which conveys them back to the scratch memory.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 15, 2022
    Inventors: Ilia OVSIANNIKOV, Yibing Michelle WANG
  • Patent number: 11431938
    Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: August 30, 2022
    Inventors: Yibing Michelle Wang, Ilia Ovsiannikov
  • Publication number: 20220269945
    Abstract: A system and a method of quantizing a pre-trained neural network, includes determining by a layer/channel bit-width determiner for each layer or channel of the pre-trained neural network a minimum quantization noise for the layer or the channel for each master bit-width value in a predetermined set of master bit-width values; and selecting by a bit-width selector for the layer or the channel the master bit-width value having the minimum quantization noise for the layer or the channel. In one embodiment, the minimum quantization noise for the layer or the channel is based on a square of a range of weights for the layer or the channel that is multiplied by a constant to a negative power of a current master bit-width value.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: Hui CHEN, Ilia OVSIANNIKOV
  • Patent number: 11394916
    Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: July 19, 2022
    Inventors: Yibing Michelle Wang, Ilia Ovsiannikov
  • Patent number: 11360930
    Abstract: A system for calculating. A scratch memory is connected to a plurality of configurable processing elements by a communication fabric including a plurality of configurable nodes. The scratch memory sends out a plurality of streams of data words. Each data word is either a configuration word used to set the configuration of a node or of a processing element, or a data word carrying an operand or a result of a calculation. Each processing element performs operations according to its current configuration and returns the results to the communication fabric, which conveys them back to the scratch memory.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: June 14, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ilia Ovsiannikov, Yibing Michelle Wang
  • Patent number: 11348009
    Abstract: A system and a method of quantizing a pre-trained neural network, includes determining by a layer/channel bit-width determiner for each layer or channel of the pre-trained neural network a minimum quantization noise for the layer or the channel for each master bit-width value in a predetermined set of master bit-width values; and selecting by a bit-width selector for the layer or the channel the master bit-width value having the minimum quantization noise for the layer or the channel. In one embodiment, the minimum quantization noise for the layer or the channel is based on a square of a range of weights for the layer or the channel that is multiplied by a constant to a negative power of a current master bit-width value.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: May 31, 2022
    Inventors: Hui Chen, Ilia Ovsiannikov
  • Publication number: 20220146683
    Abstract: An image sensor includes a time-resolving sensor and a processor. The time-resolving sensor outputs a first signal and a second signal pair in response detecting one or more photons that have been reflected from an object. A first ratio of a magnitude of the first signal to a sum of the magnitude of the first signal and a magnitude of the second signal is proportional to a time of flight of the one or more detected photons. A second ratio of the magnitude of the second signal to the sum of the magnitude of the first signal and the magnitude of the second signal is proportional to the time of flight of the one or more detected photons. The processor determines a surface reflectance of the object where the light pulse has been reflected based on the first signal and the second signal pair and may generate a grayscale image.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Inventors: Yibing Michelle WANG, Lilong SHI, Ilia OVSIANNIKOV
  • Patent number: 11294039
    Abstract: An image sensor includes a time-resolving sensor and a processor. The time-resolving sensor outputs a first signal and a second signal pair in response detecting one or more photons that have been reflected from an object. A first ratio of a magnitude of the first signal to a sum of the magnitude of the first signal and a magnitude of the second signal is proportional to a time of flight of the one or more detected photons. A second ratio of the magnitude of the second signal to the sum of the magnitude of the first signal and the magnitude of the second signal is proportional to the time of flight of the one or more detected photons. The processor determines a surface reflectance of the object where the light pulse has been reflected based on the first signal and the second signal pair and may generate a grayscale image.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: April 5, 2022
    Inventors: Yibing Michelle Wang, Lilong Shi, Ilia Ovsiannikov
  • Patent number: 11271588
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator and a non-zero values packer. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream based on a selected granularity of compression for values contained in the bit streams. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask corresponding to the selected granularity of compression. Each zero bit mask indicates a location of a zero value based on the selected granularity of compression. The non-zero values packer receives the 2N non-zero-value bit streams and forms at least one first group of packed non-zero values.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: March 8, 2022
    Inventor: Ilia Ovsiannikov
  • Patent number: 11211944
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator and a non-zero values packer. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream based on a selected granularity of compression for values contained in the bit streams. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask corresponding to the selected granularity of compression. Each zero bit mask indicates a location of a zero value based on the selected granularity of compression. The non-zero values packer receives the 2N non-zero-value bit streams and forms at least one first group of packed non-zero values.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: December 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Ilia Ovsiannikov
  • Publication number: 20210399740
    Abstract: A data compressor a zero-value remover, a zero bit mask generator, a non-zero values packer, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask for a predetermined number of values of each bit stream in which each zero bit mask indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. The non-zero values packer receives the 2N non-zero-value bit streams and forms a group of packed non-zero values. The row-pointer generator that generates a row-pointer for each group of packed non-zero values.
    Type: Application
    Filed: September 2, 2021
    Publication date: December 23, 2021
    Inventor: Ilia OVSIANNIKOV
  • Patent number: 11153551
    Abstract: An apparatus and a method are provided. The apparatus includes a light source configured to project light in a changing pattern that reduces the light's noticeability; collection optics through which light passes and forms an epipolar plane with the light source; and an image sensor configured to receive light passed through the collection optics to acquire image information and depth information simultaneously. The method includes projecting light by a light source in a changing pattern that reduces the light's noticeability; passing light through collection optics and forming an epipolar plane between the collection optics and the light source; and receiving in an image sensor light passed through the collection optics to acquire image information and depth information simultaneously.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: October 19, 2021
    Inventors: Ilia Ovsiannikov, Yibing Michelle Wang, Peter Deane