Patents by Inventor Ilia Ovsiannikov

Ilia Ovsiannikov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11152952
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator, a plurality of multiplexers, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed. The zero bit mask generator generates a zero bit mask for a predetermined number of values of each bit stream that indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. Each input of a multiplexer in a first column of the multiplexers receives a respective bit stream of the 2N bit streams of non-zero values. The multiplexers in a last column outputting 2N bit streams of values as packed non-zero values in which each output bit stream has a same bit-stream length. The row-pointer generator generates a row-pointer for each respective non-zero-value bit stream in a group of packed non-zero values.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 19, 2021
    Inventor: Ilia Ovsiannikov
  • Patent number: 11146283
    Abstract: A data compressor a zero-value remover, a zero bit mask generator, a non-zero values packer, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask for a predetermined number of values of each bit stream in which each zero bit mask indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. The non-zero values packer receives the 2N non-zero-value bit streams and forms a group of packed non-zero values. The row-pointer generator that generates a row-pointer for each group of packed non-zero values.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 12, 2021
    Inventor: Ilia Ovsiannikov
  • Publication number: 20210242880
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator and a non-zero values packer. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream based on a selected granularity of compression for values contained in the bit streams. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask corresponding to the selected granularity of compression. Each zero bit mask indicates a location of a zero value based on the selected granularity of compression. The non-zero values packer receives the 2N non-zero-value bit streams and forms at least one first group of packed non-zero values.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Inventor: Ilia OVSIANNIKOV
  • Publication number: 20210144327
    Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 13, 2021
    Inventors: Yibing Michelle WANG, Ilia OVSIANNIKOV
  • Publication number: 20210141603
    Abstract: An N×N multiplier may include a N/2×N first multiplier, a N/2×N/2 second multiplier, and a N/2×N/2 third multiplier. The N×N multiplier receives two operands to multiply. The first, second and/or third multipliers are selectively disabled if an operand equals zero or has a small value. If the operands are both less than 2N/2, the second or the third multiplier are used to multiply the operands. If one operand is less than 2N/2 and the other operand is equal to or greater than 2N/2, the first multiplier is used or the second and third multipliers are used to multiply the operands. If both operands are equal to or greater than 2N/2, the first, second and third multipliers are used to multiply the operands.
    Type: Application
    Filed: January 15, 2021
    Publication date: May 13, 2021
    Inventors: Ilia OVSIANNIKOV, Ali SHAFIEE ARDESTANI, Joseph HASSOUN, Lei WANG
  • Patent number: 10963220
    Abstract: An N×N multiplier may include a N/2×N first multiplier, a N/2×N/2 second multiplier, and a N/2×N/2 third multiplier. The N×N multiplier receives two operands to multiply. The first, second and/or third multipliers are selectively disabled if an operand equals zero or has a small value. If the operands are both less than 2N/2, the second or the third multiplier are used to multiply the operands. If one operand is less than 2N/2 and the other operand is equal to or greater than 2N/2, the first multiplier is used or the second and third multipliers are used to multiply the operands. If both operands are equal to or greater than 2N/2, the first, second and third multipliers are used to multiply the operands.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: March 30, 2021
    Inventors: Ilia Ovsiannikov, Ali Shafiee Ardestani, Joseph Hassoun, Lei Wang
  • Patent number: 10893227
    Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: January 12, 2021
    Inventors: Yibing Michelle Wang, Ilia Ovsiannikov
  • Publication number: 20200410357
    Abstract: An embodiment includes a method, comprising: pruning a layer of a neural network having multiple layers using a threshold; and repeating the pruning of the layer of the neural network using a different threshold until a pruning error of the pruned layer reaches a pruning error allowance.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 31, 2020
    Inventors: Zhengping JI, John Wakefield BROTHERS, Ilia OVSIANNIKOV, Eunsoo SHIM
  • Patent number: 10832135
    Abstract: An embodiment includes a method, comprising: pruning a layer of a neural network having multiple layers using a threshold; and repeating the pruning of the layer of the neural network using a different threshold until a pruning error of the pruned layer reaches a pruning error allowance.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: November 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Zhengping Ji, John Wakefield Brothers, Ilia Ovsiannikov, Eunsoo Shim
  • Publication number: 20200349420
    Abstract: A processor to perform inference on deep learning neural network models. In some embodiments, the process includes: a first tile, a second tile, a memory, and a bus, the bus being connected to: the memory, the first tile, and the second tile, the first tile including: a first weight register, a second weight register, an activations cache, a shuffler, an activations buffer, a first multiplier, and a second multiplier, the activations buffer being configured to include: a first queue connected to the first multiplier, and a second queue connected to the second multiplier, the activations cache including a plurality of independent lanes, each of the independent lanes being randomly accessible, the first tile being configured: to receive a tensor including a plurality of two-dimensional arrays, each representing one color component of the image; and to perform a convolution of a kernel with one of the two-dimensional arrays.
    Type: Application
    Filed: April 3, 2020
    Publication date: November 5, 2020
    Inventors: Ilia Ovsiannikov, Ali Shafiee Ardestani, Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun
  • Publication number: 20200349106
    Abstract: A processor. In some embodiments, the processor includes: a first tile, the first tile being configured: to feed a first nibble from a third queue, through a first shuffler, to a first multiplier, and to multiply, in the first multiplier, the first nibble from the third queue by a first nibble of a third weight; to feed a second nibble from the third queue, through the first shuffler, to a second multiplier, and to multiply, in the second multiplier, the second nibble from the third queue by a second nibble of the third weight; to feed a first nibble from a fourth queue, through the first shuffler, to a third multiplier, and to multiply, in the third multiplier, the first nibble from the fourth queue by a first nibble of a fourth weight.
    Type: Application
    Filed: April 13, 2020
    Publication date: November 5, 2020
    Inventor: Ilia Ovsiannikov
  • Publication number: 20200336153
    Abstract: A data compressor a zero-value remover, a zero bit mask generator, a non-zero values packer, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask for a predetermined number of values of each bit stream in which each zero bit mask indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. The non-zero values packer receives the 2N non-zero-value bit streams and forms a group of packed non-zero values. The row-pointer generator that generates a row-pointer for each group of packed non-zero values.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 22, 2020
    Inventor: Ilia OVSIANNIKOV
  • Publication number: 20200336273
    Abstract: A data-sparsity homogenizer includes a plurality of multiplexers and a controller. The plurality of multiplexers receives 2N bit streams of non-homogenous sparse data in which the non-homogenous sparse data includes non-zero value data clumped together. The plurality of multiplexers is arranged in 2N rows and N columns. Each input of a multiplexer in a first column receives a respective bit stream of the 2N bit streams of non-homogenized sparse data, and the multiplexers in a last column output 2N bit streams of sparse data that is more homogenous than the non-homogenous sparse data of the 2N bit streams. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams of sparse data that is more homogeneous than the non-homogenous sparse data of the 2N bit streams.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 22, 2020
    Inventors: Ilia OVSIANNIKOV, Lei WANG
  • Publication number: 20200336154
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator, a plurality of multiplexers, and a row-pointer generator. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed. The zero bit mask generator generates a zero bit mask for a predetermined number of values of each bit stream that indicates a location of a zero value in the predetermined number of values corresponding to the zero bit mask. Each input of a multiplexer in a first column of the multiplexers receives a respective bit stream of the 2N bit streams of non-zero values. The multiplexers in a last column outputting 2N bit streams of values as packed non-zero values in which each output bit stream has a same bit-stream length. The row-pointer generator generates a row-pointer for each respective non-zero-value bit stream in a group of packed non-zero values.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 22, 2020
    Inventor: Ilia OVSIANNIKOV
  • Publication number: 20200336272
    Abstract: A multichannel data packer includes a plurality of two-input multiplexers and a controller. The plurality of two-input multiplexers is arranged in 2N rows and N columns in which N is an integer greater than 1. Each input of a multiplexer in a first column receives a respective bit stream of 2N channels of bit streams. Each respective bit stream includes a bit-stream length based on data in the bit stream. The multiplexers in a last column output 2N channels of packed bit streams each having a same bit-stream length. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams that each has the same bit-stream length.
    Type: Application
    Filed: April 7, 2020
    Publication date: October 22, 2020
    Inventors: Ilia OVSIANNIKOV, Lei WANG, Ali ARDESTANI SHAFIEE, Joseph H. HASSOUN
  • Publication number: 20200336155
    Abstract: A data compressor includes a zero-value remover, a zero bit mask generator and a non-zero values packer. The zero-value remover receives 2N bit streams of values and outputs 2N non-zero-value bit streams having zero values removed from each respective bit stream based on a selected granularity of compression for values contained in the bit streams. The zero bit mask generator receives the 2N bit streams of values and generates a zero bit mask corresponding to the selected granularity of compression. Each zero bit mask indicates a location of a zero value based on the selected granularity of compression. The non-zero values packer receives the 2N non-zero-value bit streams and forms at least one first group of packed non-zero values.
    Type: Application
    Filed: April 7, 2020
    Publication date: October 22, 2020
    Inventor: Ilia OVSIANNIKOV
  • Patent number: 10735714
    Abstract: A Time-of-Flight (TOF) technique is combined with analog amplitude modulation within each pixel in a pixel array using multiple Single Photon Avalanche Diodes (SPADs) in conjunction with a single Pinned Photo Diode (PPD) in each pixel. A SPAD may be shared among multiple neighboring pixels. The TOF information is added to the received light signal by the analog domain-based single-ended to differential converter inside the pixel itself. The spatial-temporal correlation among outputs of multiple, adjacent SPADs in a pixel is used to control the operation of the PPD to facilitate recording of TOF values and range of an object. Erroneous range measurements due to ambient light are prevented by stopping the charge transfer from the PPD—and, hence, recording a TOF value—only when two or more SPADs in the pixel are triggered within a pre-defined time interval. An autonomous navigation system with multi-SPAD pixels provides improved vision for drivers under difficult driving conditions.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: August 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yibing Michelle Wang, Lilong Shi, Ilia Ovsiannikov
  • Patent number: 10733760
    Abstract: A Dynamic Vision Sensor (DVS) pose-estimation system includes a DVS, a transformation estimator, an inertial measurement unit (IMU) and a camera-pose estimator based on sensor fusion. The DVS detects DVS events and shapes frames based on a number of accumulated DVS events. The transformation estimator estimates a 3D transformation of the DVS camera based on an estimated depth and matches confidence-level values within a camera-projection model such that at least one of a plurality of DVS events detected during a first frame corresponds to a DVS event detected during a second subsequent frame. The IMU detects inertial movements of the DVS with respect to world coordinates between the first and second frames. The camera-pose estimator combines information from a change in a pose of the camera-projection model between the first frame and the second frame based on the estimated transformation and the detected inertial movements of the DVS.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: August 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Zhengping Ji, Lilong Shi, Yibing Michelle Wang, Hyun Surk Ryu, Ilia Ovsiannikov
  • Publication number: 20200234099
    Abstract: A processor includes a register, a non-zero weight value selector and a multiplier. The register holds a first group of weight values and a second group of weight values. Each group of weight values includes at least one weight value, and each weight value in the first group of weight values corresponding to a weight value in the second group of weight values. The non-zero weight value selector selects a non-zero weight value from a weight value in the first group of weight values or a non-zero weight value in the second group of weight values that corresponds to the weight value in the first group of weight values. The multiplier multiplies the selected non-zero weight value and an activation value that corresponds to the selected non-zero weight value to form an output product value.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventors: Lei WANG, Ilia OVSIANNIKOV
  • Publication number: 20200162721
    Abstract: An apparatus and a method are provided. The apparatus includes a light source configured to project light in a changing pattern that reduces the light's noticeability; collection optics through which light passes and forms an epipolar plane with the light source; and an image sensor configured to receive light passed through the collection optics to acquire image information and depth information simultaneously. The method includes projecting light by a light source in a changing pattern that reduces the light's noticeability; passing light through collection optics and forming an epipolar plane between the collection optics and the light source; and receiving in an image sensor light passed through the collection optics to acquire image information and depth information simultaneously.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Ilia OVSIANNIKOV, Yibing Michelle WANG, Peter DEANE