Patents by Inventor In Bae Yoon

In Bae Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11189876
    Abstract: A battery module including a plurality of cylindrical battery cells; a module housing having an accommodating part; a bus bar electronically connected to electrode terminals of at least two cylindrical battery cell; and a current collecting plate contacting with a current collecting plate of an adjacent battery module and being electronically connected to a plurality of cylindrical battery cells of the adjacent battery module, wherein a guide coupling structure, including a coupling protrusion and a guiding groove, guides an arrangement location of the adjacent battery module on an outer surface of an external wall of the module housing.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 30, 2021
    Assignee: LG CHEM, LTD.
    Inventors: Kwang-Bae Lee, Seog-Jin Yoon
  • Patent number: 11152926
    Abstract: A modulator includes: a high voltage transformer transforming a voltage supplied through a primary side and a secondary side to apply a current pulse to a driving device; a bipolar pulse generator applying a magnetizing pulse and a main pulse to a connection line connected to the primary side of the high voltage transformer; and a timing controller controlling a time difference of applying the magnetizing pulse and the main pulse, wherein the bipolar pulse generator includes a magnetizing pulse generation unit generating the magnetizing pulse by using positive power, and a main pulse generation unit generating a negative pulse by using negative power. Also, the modulator includes a pulse waveform controller in which a plurality of unit modules of the same structure is disposed in series through a small transformer on the secondary side of the high voltage transformer.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: October 19, 2021
    Assignee: KOREA ATOMIC ENERGY RESEARCH INSTITUTE
    Inventors: Young Uk Jeong, Gudkov Boris, Ki Tae Lee, Sangyoon Bae, Tae Sik Yoon
  • Publication number: 20210288128
    Abstract: An electronic device package includes: a substrate including a central region, and a first side region and a second side region at opposite sides of the central region; a first component in the first side region or the second side region, the first component having a first height above a surface of the substrate; a second component in the central region, the second component having a second height above the surface of the substrate that is lower than the first height; a reinforcement member in the central region and overlapping the second component, the reinforcement member having a third height above the surface of the substrate that is lower than the first height and higher than the second height; and an encapsulation member covering the first component and the second component.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 16, 2021
    Inventors: Seung Hwan CHEONG, Sung Bae PARK, Myung Joon YOON, Kyu Min HAN
  • Publication number: 20210280366
    Abstract: The present invention pertains to a transformer, and more specifically, to a transformer which includes a primary coil unit comprising wound conductive lines, and a secondary coil unit in which conductive plates are stacked. The transformer according to an embodiment of the present invention may include: a bobbin; a core unit which is coupled to the bobbin along the outer side of the bobbin; and a plurality of conductive plates which are inserted into the bobbin and stacked in the thickness direction.
    Type: Application
    Filed: June 14, 2019
    Publication date: September 9, 2021
    Inventors: Soo Kwang YOON, Yu Seon KIM, Seok BAE, Jung Ki LEE
  • Patent number: 10971518
    Abstract: A three-dimensional semiconductor memory device includes a substrate, an electrode structure including electrodes vertically stacked on the substrate and each having a pad portion, electrode separation structures penetrating the electrode structure and apart from each other in a second direction, and contact plugs coupled to the pad portions. The contact plugs comprise first contact plugs and second contact plugs apart in the second direction from the first contact plugs. The electrode separation structures comprise a first electrode separation between the first and second contact plugs. The first contact plugs are apart in the second direction at a first distance from the first electrode separation structure. The second contact plugs are apart in the second direction from the first electrode separation structure at a second distance, different from the first distance.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: April 6, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jibong Park, Soyeon Kim, Hanyoung Lee, Young-Bae Yoon, Dongseog Eun
  • Patent number: 10878908
    Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: December 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Da Woon Jeong, Sung-Hun Lee, Seokjung Yun, Hyunmog Park, JoongShik Shin, Young-Bae Yoon
  • Patent number: 10854622
    Abstract: A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: December 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Bae Yoon, Joong-Shik Shin, Kwang-Ho Kim, Hyun-Mog Park
  • Patent number: 10819588
    Abstract: A method for auto-scaling at least one web server and at least one WAS (Web Application Server) is provided. The method includes a WAS administrating server grouping, as a first service group, both at least one first web server and at least one first WAS, which are connected with each other to provide a first application service, and grouping, as a second service group, both at least one second web server and at least one second WAS, which are connected with each other to provide a second application service, to thereby create at least two groups each of which includes at least its corresponding pair of web server and WAS, and the WAS administrating server allowing each of the grouped pairs of the web servers and the WAS's to be scaled out or scaled in, independently, by a process of scaling-out or scaling-in.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: October 27, 2020
    Assignee: TMAXSOFT. CO., LTD.
    Inventors: Young Hwi Jang, Sung Bae Yoon, Hee Jin Lee
  • Publication number: 20200295023
    Abstract: A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-Bae YOON, Joong-Shik SHIN, Kwang-Ho KIM, Hyun-Mog PARK
  • Publication number: 20200278720
    Abstract: An electronic device includes a body including a first portion and a second portion, a display including a first display area and a second display area, and a processor embedded inside the body. The first portion and the second portion rotate about a rotation axis. The first display area is disposed in the first portion. The second display area is disposed in the second portion. The processor is configured to execute a plurality of applications in the first display area by a first division line in a state where the body is folded by rotation of the first portion and the second portion and to execute the plurality of applications in the first display area and the second display area by a second division line parallel to the rotation axis in a state where the body is unfolded by the rotation of the first portion and the second portion.
    Type: Application
    Filed: September 18, 2018
    Publication date: September 3, 2020
    Inventors: Joon Hwan KIM, Sun Hee KANG, Ji Eun YANG, Sun Mi YOU, Kwang Bae YOON
  • Patent number: 10741571
    Abstract: A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: August 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Bae Yoon, Joong-Shik Shin, Kwang-Ho Kim, Hyun-Mog Park
  • Patent number: 10742477
    Abstract: A method for connecting webservers and web application servers (WAS's) is provided. The method includes steps of: (a) a WAS admin server, while managing multiple existing WAS managed servers and communicating with multiple existing webservers, if a new webserver except the multiple existing webservers or a new WAS managed server except the multiple existing WAS managed servers is determined as being operated, receiving connection state information of the new webserver or that of the new WAS managed server; and (b) the WAS admin server delivering the connection state information of the new webserver or that of the new WAS to the multiple existing WAS managed servers and the multiple existing webservers.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: August 11, 2020
    Assignee: TMAXSOFT CO., LTD.
    Inventors: Sung Bae Yoon, Young Hwi Jang
  • Publication number: 20200143017
    Abstract: An electronic device and a control method therefor are disclosed. The disclosed electronic device includes an input part, a communication part, a processor, and a memory, wherein the memory may include instructions for controlling the communication part such that the processor requests identification information including a call word for using an artificial intelligence assistant function to another electronic device when an event for requesting configuration of a first mode in which the artificial intelligence assistant function of the other electronic device can be used occurs, for controlling the communication part to receive the identification information from the other electronic device through the communication part in response to the request, and transmit a user command to the other electronic device based on the identification information if the user command is received during operation of the first mode of the artificial intelligence assistant.
    Type: Application
    Filed: September 17, 2018
    Publication date: May 7, 2020
    Inventors: Chang-bae YOON, Jeong-in KIM, Se-won OH, Hyo-young CHO, Kyung-rae KIM, Hee-jung KIM, Hyun-jin YANG, Ji-won CHA
  • Publication number: 20200105786
    Abstract: A three-dimensional semiconductor memory device includes a substrate, an electrode structure including electrodes vertically stacked on the substrate and each having a pad portion, electrode separation structures penetrating the electrode structure and apart from each other in a second direction, and contact plugs coupled to the pad portions. The contact plugs comprise first contact plugs and second contact plugs apart in the second direction from the first contact plugs. The electrode separation structures comprise a first electrode separation between the first and second contact plugs. The first contact plugs are apart in the second direction at a first distance from the first electrode separation structure. The second contact plugs are apart in the second direction from the first electrode separation structure at a second distance, different from the first distance.
    Type: Application
    Filed: May 14, 2019
    Publication date: April 2, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jibong Park, Soyeon Kim, Hanyoung Lee, Young-Bae Yoon, Dongseog Eun
  • Publication number: 20200075101
    Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.
    Type: Application
    Filed: October 22, 2019
    Publication date: March 5, 2020
    Inventors: Da Woon JEONG, Sung-Hun LEE, Seokjung YUN, Hyunmog PARK, JoongShik SHIN, Young-Bae YOON
  • Patent number: 10536922
    Abstract: A controlling method of an electronic device is provided. The method includes receiving a search request for a searching object device from a terminal device, broadcasting a pre-defined search signal in response to the search request, in response to a response signal being received from an external device in response to the pre-defined search signal, analyzing a pattern of the received response signal and determining whether the external device is the searching object device, and in response to the external device being determined as the searching object device, transmitting intensity information of the received response signal to the terminal device to determine a position of the external device which is determined as the searching object device.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: January 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chang-bae Yoon
  • Publication number: 20190363955
    Abstract: A method for auto-scaling at least one web server and at least one WAS (Web Application Server) is provided. The method includes a WAS administrating server grouping, as a first service group, both at least one first web server and at least one first WAS, which are connected with each other to provide a first application service, and grouping, as a second service group, both at least one second web server and at least one second WAS, which are connected with each other to provide a second application service, to thereby create at least two groups each of which includes at least its corresponding pair of web server and WAS, and the WAS administrating server allowing each of the grouped pairs of the web servers and the WAS's to be scaled out or scaled in, independently, by a process of scaling-out or scaling-in.
    Type: Application
    Filed: June 13, 2018
    Publication date: November 28, 2019
    Inventors: Young Hwi Jang, Sung Bae Yoon, Hee Jin Lee
  • Patent number: 10482964
    Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Da Woon Jeong, Sung-Hun Lee, Seokjung Yun, Hyunmog Park, JoongShik Shin, Young-Bae Yoon
  • Publication number: 20190068432
    Abstract: A method for connecting webservers and web application servers (WAS's) is provided. The method includes steps of: (a) a WAS admin server, while managing multiple existing WAS managed servers and communicating with multiple existing webservers, if a new webserver except the multiple existing webservers or a new WAS managed server except the multiple existing WAS managed servers is determined as being operated, receiving connection state information of the new webserver or that of the new WAS managed server; and (b) the WAS admin server delivering the connection state information of the new webserver or that of the new WAS to the multiple existing WAS managed servers and the multiple existing webservers.
    Type: Application
    Filed: August 22, 2018
    Publication date: February 28, 2019
    Applicant: TMAXSOFT CO., LTD.
    Inventors: Sung Bae YOON, Young Hwi JANG
  • Publication number: 20190008743
    Abstract: The present invention relates to polymer composite particles containing much organic sunscreen agents and a method of preparing the polymer composite particles, and more particularly to polymer composite particles containing much organic sunscreen agents that are spherical polymer composite particles in which solid organic Sunscreen agents are embedded between polymer matrixes by 40 to 50 wt %, include a significantly larger amount of the organic sunscreen agents than polymer composite particles of related art, have excellent light stability despite presence of a large amount of organic sunscreen agents, are superior not only in UV-A region but also UV-B region, are excellent in skin stability and feeling of use when applied to cosmetics, and can significantly improve sunscreen function, and a method of preparing the polymer composite particles.
    Type: Application
    Filed: June 24, 2016
    Publication date: January 10, 2019
    Inventors: Sung-Ho LEE, Jang-Ho PARK, Yang-Bae YOON, Deuk-Yong SEONG