Patents by Inventor In Choi

In Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162239
    Abstract: Discussed are a display panel and a display device including thin film transistors having high reliability and a high current producing characteristic. In one example, the display panel includes a first active layer disposed on a substrate and including a first channel region, a second active layer overlapping a portion of the first active layer and including a second channel region not overlapping the first channel region of the first active layer, first and second electrodes disposed in respective portions of the first and second active layers, respectively, and spaced apart from each other, a gate insulating layer disposed in respective portions of upper surfaces of the first and second active layers, and a third electrode disposed on the gate insulating layer.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 16, 2024
    Applicant: LG Display Co., Ltd.
    Inventors: Dohyung LEE, ChanYong JEONG, JuHeyuck BAECK, Younghyun KO, HongRak CHOI
  • Publication number: 20240160397
    Abstract: A modular display apparatus is disclosed. The modular display apparatus includes a plurality of display modules, and a controller configured to control the plurality of display modules, and the plurality of display modules include a plurality of scan groups, respectively, the controller is configured to transmit an image signal corresponding to the respective display modules based on an image frame, and the respective scan groups included in a first display module from among the plurality of display modules includes a plurality of scan lines arranged in one direction, a plurality of data lines arranged in a direction perpendicular to the plurality of scan lines, light emitting diodes generated at a cross area of the scan lines and the data lines, and at least one driver integrated circuit.
    Type: Application
    Filed: December 20, 2023
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Deukgeun AHN, Jaehyang Lee, Hyeokjun Choi
  • Publication number: 20240161514
    Abstract: According to an embodiment of the present invention, a method for controlling a vehicular electronic device comprises capturing an image in front of a vehicle, detecting a speed bump from the captured front image, obtaining information on the vehicle's location when the speed bump is detected, generating location information of the speed bump based on the obtained location information of the vehicle, determining whether the speed bump includes irregularities and generating speed bump information using at least one of information on whether the speed bump includes irregularities and information on a location of the speed bump, and transmitting the speed bump information to a vehicle service providing server. According to the present invention, an alarm is generated only when a speed bump ahead of the vehicle includes irregularities, thereby reducing user confusion.
    Type: Application
    Filed: August 3, 2023
    Publication date: May 16, 2024
    Applicant: THINKWARE CORPORATION
    Inventors: Ye Chan CHOI, Yo Sep PARK
  • Publication number: 20240160570
    Abstract: Mechanisms to identify key sections of input-output (IO) packets and use for efficient IO caching and associated apparatus and methods. Data, such as packets, are received from an IO device coupled to an IO port on a processor including a cache domain including multiple caches, such as L1/L2 and L3 or Last Level Cache (LLC). The data are logically partitioned into cache lines and embedded logic on the processor is used to identify one or more important cache lines using a cache importance pattern. Cache lines that are identified as important are written to a cache or a first cache level, while unimportant cache lines are written to memory or a second cache level that is higher than the first cache level. Software running on one or more processor cores may be used to program cache importance patterns for one or more data types or transaction types.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Inventors: George Leonard TKACHUK, Aneesh AGGARWAL, Niall D. MCDONNELL, Youngsoo CHOI, Chitra NATARAJAN, Prasad GHATIGAR, Shrikant M. SHAH
  • Publication number: 20240161524
    Abstract: Provided is an electronic device for identifying output content. The electronic device includes: a display; a memory storing at least one instruction; and at least one processor configured to execute the at least one instruction to: recognize a text in an image output through the display, obtain valid data from the recognized text, obtain comparison data for each title of a plurality of titles in a title list, identify comparison data that matches the valid data from among the obtained comparison data, and provide additional information based on a title corresponding to the identified comparison data.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jinwuk CHOI, Byounghyun KIM, Youngin PARK, Sangyoung LEE, Cheulhee HAHM
  • Publication number: 20240160612
    Abstract: There is provided a method for dividing query computations and scheduling for CSDs in a DB system in which a plurality of CSDs are used as a storage. A scheduling method according to an embodiment includes: selecting one of a plurality of scheduling polices; selecting a CSD to which snippets included in a group are delivered according to the selected scheduling policy; and delivering the snippets to the selected CSD, and the scheduling polices are polices for selecting CSDs to which snippets are delivered, based on different criteria. Accordingly, CSDs may be randomly selected according to user setting or a query execution environment, or an optimal CSD may be selected according to a CSD status or a content of an offload snippet, so that a query execution speed can be enhanced.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 16, 2024
    Applicant: Korea Electronics Technology Institute
    Inventors: Jae Hoon AN, Young Hwan KIM, Ri A CHOI
  • Publication number: 20240161674
    Abstract: A display panel includes first pixels which emit light of different colors, a second pixels which emit light of different colors, a light blocking member on the first and second pixels to block a portion of light emitted therefrom. Each of the first and second pixels includes a pixel circuit, a main light emitting device connected to the pixel circuit, and an auxiliary light emitting device which emits light of a same color as the main light emitting device and is connected to the main light emitting device. The main light emitting device of a first pixel and the auxiliary light emitting device of a second pixel are disposed in a first unit pixel area, and the main light emitting device of the second pixel and the auxiliary light emitting device of the first pixel are disposed in a second unit pixel area adjacent to the first unit pixel area.
    Type: Application
    Filed: September 21, 2023
    Publication date: May 16, 2024
    Inventor: JUNWON CHOI
  • Publication number: 20240160926
    Abstract: A computer-implemented method includes adding an auxiliary network of a group of auxiliary networks to a respective partition of a group of partitions associated with a main network. The method also includes training each of the group of auxiliary networks with training data to adapt to a test distribution. The method further includes adapting each of the group of auxiliary networks with test data to adapt to the test distribution. The method still further includes classifying an input received at a model based on adapting each of the group of auxiliary networks. The model may include the group of partitions and the group of auxiliary networks.
    Type: Application
    Filed: October 2, 2023
    Publication date: May 16, 2024
    Inventors: Junha SONG, Sungha CHOI
  • Publication number: 20240160895
    Abstract: Disclosed is a method for predicting areas of environmental information needed to be collected, which is performed by one or more processors of a computing device. The method may include: outputting one or more episodes based on environmental information; measuring uncertainty for each of the one or more episodes; and predicting an area of the environmental information needed to be collected based on the measured uncertainty.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 16, 2024
    Applicants: MakinaRocks Co., Ltd., Hanon Systems
    Inventors: Taeho LEE, Minseop KIM, Sanghyeok CHOI, Jeonghoon LEE, Joongjae KIM, Ikchan JU
  • Publication number: 20240160951
    Abstract: Disclosed is a method for control simulation based on artificial intelligence according to an exemplary embodiment of the present disclosure. Specifically, according to the present disclosure, a computing device obtains a first state information, a second state information, and a control information, and generates first output information based on the first state information, the second state information, and the control information by using an artificial neural network model including a sequential neural network. In this case, the first output information includes one or more output variables, and at least some of the one or more output variables correspond to variables included in the second state information, and the first output information is generated based on applying an attention mechanism to each of the one or more output variables.
    Type: Application
    Filed: November 10, 2023
    Publication date: May 16, 2024
    Applicants: MakinaRocks Co., Ltd., Hanon Systems
    Inventors: Hongje PARK, Sanghyeok CHOI, Jongwon PARK, Minseop KIM, Jeonghoon LEE, Joongjae KIM, Ikchan JU
  • Publication number: 20240162113
    Abstract: In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: November 11, 2022
    Publication date: May 16, 2024
    Applicants: Amkor Technology Singapore Holding Pte. Ltd., Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Dong Hyeon Park, Yun Ah Kim, Seok Ho Na, Won Ho Choi, Dong Su Ryu, Jo Hyun Bae, Min Jae Kong, Jin Young Khim, Jae Yeong Bae, Dong Hee Kang
  • Publication number: 20240160839
    Abstract: A language correction system, a method therefor, and a language correction model learning method of the system are disclosed. The system comprises a correction model learning unit and a language correction unit. The correction model learning unit performs machine learning on a plurality of data sets consisting of ungrammatical sentence data and error-free grammatical sentence data respectively corresponding to the ungrammatical sentence data, so as to generate a correction mode for detecting grammatical sentence data corresponding to ungrammatical sentence data to be corrected. The language correction unit generates, for a sentence to be corrected, a corresponding corrected sentence by using the correction model generated by the correction model learning unit, and displays and outputs the corrected parts together with the generated corrected sentence.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: LLSOLLU CO., LTD.
    Inventors: Jong Keun CHOI, Sumi LEE, Dongpil KIM
  • Publication number: 20240162152
    Abstract: One or more systems, devices and/or methods of use provided herein relate to an airgap spacer for power via. The semiconductor device can comprise a power bar wired to a backside power rail, wherein the power bar is located between a first gate of a first field effect transistor (FET) and a second gate of a second FET at least a first airgap between the power bar and at least a portion of the first gate of the first FET and a second airgap between the power bar and at least a portion of the second gate of the second FET, wherein the at least the first airgap and the second airgap maintain parasitic capacitance in the semiconductor device below a threshold.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Inventors: Ruilong Xie, Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Kisik Choi, Huai Huang
  • Publication number: 20240160523
    Abstract: A semiconductor system includes a controller configured to output a command and multiple addresses for performing a read modify write operation when the multiple addresses for performing a read operation have a logic level combination for selecting contiguous regions and configured to output first data for performing a write operation, and a semiconductor device configured to store the first data for performing the write operation as write data based on the command, configured to output internal data from a core circuit as the read operation is consecutively performed based on the command and the addresses, configured to generate parities by performing an error correction code (ECC) operation based on the internal data and the write data, and configured to store the write data and the parities in the core circuit.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 16, 2024
    Inventor: Won Ha CHOI
  • Publication number: 20240162404
    Abstract: A display device is disclosed that includes a substrate, a display portion, a conductive layer, an inorganic layer, and an amorphous silicon layer. The substrate includes a first area including a transmission area and a non-transmission area adjacent to the transmission area, and a second area adjacent to the first area. The display portion is disposed in the non-transmission area and the second area on the substrate. The conductive layer is disposed between the substrate and the display portion, and overlaps the non-transmission area and the second area. The inorganic layer is disposed on the substrate under the conductive layer, in contact with the conductive layer, and overlaps the conductive layer. The amorphous silicon layer is disposed on the substrate, under the inorganic layer, in contact with the inorganic layer, overlaps the conductive layer in the first area, and entirely overlaps the substrate in the second area.
    Type: Application
    Filed: September 11, 2023
    Publication date: May 16, 2024
    Inventors: MYOUNGGEUN CHA, KISEOK CHOI, DONGKYUN SEO, HEEKYUN SHIN, YONG-HOON YANG
  • Publication number: 20240161156
    Abstract: Provided is a method and a system for a chauffeur recommendation service by which a chauffeur preference property of a current user is determined based on a correlation between a plurality of existing users with a history of using a chauffeur service and the current user, and at least one chauffeur matching the chauffeur preference property of the current user is selected and recommended among a plurality of chauffeurs, and accordingly, a user may use a chauffeur service provided by a chauffeur matching his/her personal property.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 16, 2024
    Inventor: Min-Suk CHOI
  • Publication number: 20240163428
    Abstract: Provided are a video decoding method and a video decoding device, which, during video encoding and decoding processes, obtain most probable mode (MPM) information indicating whether to use MPMs of a current block determined based on at least two of a prediction mode of a left neighboring block adjacent to a left side of the current block, a prediction mode of an upper neighboring block adjacent to an upper side of the current block, and a right neighboring block adjacent to a right side of the current block, obtain extended intra mode set information indicating whether to use an extended intra mode set configured based on the MPMs, and determine an intra prediction mode of the current block based on the MPM information and the extended intra mode set information.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Narae CHOI, Bora Jin, Yinji Piao, Minwoo Park
  • Publication number: 20240161829
    Abstract: Provided herein is a memory device for performing a program operation, a method of operating the memory device, and a storage device having the memory device. The method of operating a memory device includes receiving a first data bit among a plurality of data bits to be stored in each of a plurality of memory cells from a memory controller, performing a program voltage apply operation on the plurality of memory cells based on the first data bit, and receiving a second data bit among the plurality of data bits from the memory controller while performing the program voltage apply operation.
    Type: Application
    Filed: March 31, 2023
    Publication date: May 16, 2024
    Applicant: SK hynix Inc.
    Inventors: Hyung Jin CHOI, Gwi Han KO, Chan Sik PARK
  • Publication number: 20240162293
    Abstract: A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 16, 2024
    Inventors: Jinbum Kim, DAHYE KIM, SEOKHOON KIM, JAEMUN KIM, Ilgyou Shin, Haejun YU, KYUNGIN CHOI, KIHYUN HWANG, SANGMOON LEE, SEUNG HUN LEE, KEUN HWI CHO
  • Publication number: 20240161930
    Abstract: Disclosed is a method for generating a prediction result by using static data and dynamic data according to an exemplary embodiment of the present disclosure. Specifically, according to the present disclosure, a computing device generates an integrated feature vector from static data and dynamic data of input data by using an artificial neural network model. The computing device generates a dynamic feature vector from the dynamic data of the input data by using the artificial neural network model. The computing device generates a final prediction result of the artificial neural network model based on the integrated feature vector and the dynamic feature vector.
    Type: Application
    Filed: August 7, 2023
    Publication date: May 16, 2024
    Inventors: Yunseob SHIN, Yunwon TAE, Kyungjae CHO, Jaewoo CHOI