Patents by Inventor In Chul Song

In Chul Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9412895
    Abstract: A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted. According to one or more embodiments of the present invention, a photoelectric device having a reduction in the number of processes for manufacturing the photoelectric device and improved output characteristics is provided.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: August 9, 2016
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Young-Jin Kim, Doo-Youl Lee, Young-Su Kim, Chan-Bin Mo, Young-Sang Park, Jae-Ho Shin, Sang-Jin Park, Sang-Won Seo, Min-Chul Song, Dong-Seop Kim
  • Publication number: 20160227159
    Abstract: A method for transmitting device indicator data in a network-based AV system is provided. The method for transmitting the device indicator data records device indicator data on a data unit which is used in an AV transmission protocol, and transmits the data unit. Accordingly, the indicator data which changes in real time in a network AV device can be rapidly transmitted to a management platform.
    Type: Application
    Filed: December 2, 2015
    Publication date: August 4, 2016
    Applicant: Korea Electronics Technology Institute
    Inventors: Byoung Chul SONG, Ki Won KWON, Jung Wook WEE, Kyung Won PARK
  • Publication number: 20160219732
    Abstract: A curved display device includes a curved display panel including a first substrate and a second substrate facing the first substrate, the first substrate including a display area for displaying an image and a non-display area, a sealing member interposed between the first substrate and the second substrate and surrounding the display area, and a reinforcement member arranged on an outside of the sealing member, wherein the curved display panel includes a first side surface including a curved side, a second side surface including a curved side and facing the first side surface, a third side surface and a fourth side surface connecting the first side surface and the second side surface, the third side surface and the fourth side surface facing each other, and wherein the reinforcement member is attached to at least one of the first side surface and the second side surface.
    Type: Application
    Filed: May 20, 2015
    Publication date: July 28, 2016
    Inventors: YOUNG JE CHO, Yu Jin Lee, Min Chul Song, Yeon Mun Jeon
  • Patent number: 9395417
    Abstract: A battery pack is disclosed. In one aspect, the battery pack includes a battery including at least one battery cell and a battery managing unit for controlling charging and discharging of the battery. The battery managing unit includes a measuring unit measuring at least one parameter of the battery per sampling period and generating measurement data. The battery managing unit also includes a control unit including a plurality of counters corresponding to a plurality of sections defined with respect to the parameter and configured to increment a counter corresponding to the section including the measurement data. The battery managing unit also includes a storage unit storing counter values of the counters in a predetermined address per logging period.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: July 19, 2016
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Hyun-Chul Song
  • Patent number: 9377655
    Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 28, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung Man Kim, Sung Hoon Kim, Man Hong Na, Min-Chul Song, Jun Ho Song, Eu Gene Lee, Sung-Hoon Lim, Young Je Cho, Sun-Kyu Joo, Soo Jung Chae
  • Publication number: 20160172443
    Abstract: A method for tuning a threshold voltage of a semiconductor device includes implanting at least one dopant in a semiconductor substrate at an angle to form a source region and/or a drain region of a transistor. The angle is oblique to a surface of the substrate. Implanting the at least one dopant at the angle alters a flat-band voltage of the transistor and shifts the threshold voltage of the transistor. The at least one dopant or at least one additional dopant can be implanted in a gate electrical contact of the transistor. Implanting the at least one dopant at the oblique angle can change an electrostatic potential of a gate electrical contact of the transistor compared to implanting the at least one dopant at a non-oblique angle, and the change in the electrostatic potential of the gate electrical contact can shift the threshold voltage of the transistor.
    Type: Application
    Filed: December 11, 2015
    Publication date: June 16, 2016
    Inventors: Younsung Choi, Kwan-Yong Lim, Seung-Chul Song, Song Zhao
  • Patent number: 9362375
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 7, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Chet Vernon Lenox, Seung-Chul Song, Brian K. Kirkpatrick
  • Patent number: 9337100
    Abstract: An apparatus and method to fabricate an electronic device is disclosed. In a particular embodiment, an apparatus includes a template having an imprint surface. The imprint surface includes a first region having a first pattern adapted to fabricate a fin field effect transistor (FinFET) device and a second region having a second pattern adapted to fabricate a planar electronic device.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: May 10, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Seung-Chul Song, Beom-Mo Han, Mohamed Hassan Abu-Rahma
  • Publication number: 20160099585
    Abstract: A battery pack and a driving method thereof are disclosed. In one aspect, the method includes outputting first data at the first rack BMS, determining whether a response to the first data has been received, and driving the first rack BMS based on whether the response has been received.
    Type: Application
    Filed: September 9, 2015
    Publication date: April 7, 2016
    Inventor: Hyun-Chul Song
  • Publication number: 20160085106
    Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Inventors: SUNG-HOON LIM, MAN HONG NA, YOUNG-JE CHO, SUNG-MAN KIM, MIN-CHUL SONG, SOO JUNG CHAE, EU GENE LEE
  • Patent number: 9285643
    Abstract: A liquid crystal display includes pixels which is disposed in row and column directions, respectively includes pixel electrodes, and arranged along a first pixel column to a sixth pixel column, gate lines including pairs of two adjacent gate lines for each pixel row in the row direction, data lines including a first data line at a left side of the first pixel column, a second data line between the second and third pixel columns, a third data line between the fourth and fifth pixel columns, and a fourth data line at a right side of the sixth pixel column; and common voltage lines including a first common voltage line between the first and second pixel columns, a second common voltage line between the third and fourth pixel columns, and a third common voltage line between the fifth and sixth pixel columns.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: March 15, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Min-Chul Song, Sung Man Kim, Jun Ho Song, Hwa Yeul Oh, Yu Jin Lee, Young Je Cho
  • Patent number: 9240692
    Abstract: A power storage system and a method of driving the power storage system and preventing damages due to possible erroneous operations are disclosed. One inventive aspect includes a power converter that converts power, a power storage device that stores power and a main switch that is configured to switch between a charge path and a discharge path. The power storage system controls the main switch by sensing a connection between the power converter and the power storage device.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: January 19, 2016
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Hyun-Chul Song
  • Publication number: 20160005768
    Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Min-Chul SONG, Man Hong NA, Young Je CHO, Sung Man KIM, Sung-Hoon LIM, Soo Jung CHAE, Eu Gene LEE
  • Patent number: 9224656
    Abstract: An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is carbon-containing silicon nitride formed using a hydrocarbon reagent. A second layer of the hard mask is chlorine-containing silicon nitride formed on the first layer using a chlorinated silane reagent. After SiGe epitaxial source/drain regions are formed, the hard mask is removed using a wet etch which removes the second layer at a rate at least three times faster than the first layer.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: December 29, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deborah Jean Riley, Seung-Chul Song
  • Patent number: 9222511
    Abstract: The present invention relates to a sliding bearing including a lubricating oil storing unit storing lubricating oil on the surface thereof and the sliding bearing of the present invention is provided so that the volume of the lubricating oil storing unit occupies 5 to 30 volume % of the entire volume of the sliding bearing.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: December 29, 2015
    Assignee: DOOSAN INFRACORE CO., LTD.
    Inventors: Chung Rae Lee, Ki Hwan Hong, Sang Beom Kim, Keun Chul Song
  • Patent number: 9224867
    Abstract: In a thin film transistor array panel and a method of manufacturing the same, a thin passivation layer is positioned between a first field generating electrode and a second field generating electrode. The thin passivation layer overlaps the first and second field generating electrodes. The thin passivation layer includes a transparent photosensitive organic material. When forming the first field generating electrode, the passivation layer is used as a photosensitive film. Accordingly, the passivation layer and the first field generating electrode may be formed using a same single photo-mask. Accordingly, the manufacturing cost of the thin film transistor array panel may be reduced.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: December 29, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eu Gene Lee, Min-Chul Song, Sung Man Kim, Young Je Cho, Hwa Yeul Oh, Hyun Ki Hwang
  • Patent number: 9218790
    Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: December 22, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Hoon Lim, Man Hong Na, Young-Je Cho, Sung-Man Kim, Min-Chul Song, Soo Jung Chae, Eu Gene Lee
  • Patent number: 9201180
    Abstract: A color filter array and image obtaining apparatus are provided. The color filter array includes at least one unit cell having a predetermined array of pixels, and the predetermined array including the color pixels and transparent pixels. Each 2×2 array of pixels in the unit cell includes one transparent pixel and three color pixels and at least one transparent pixel is located in each row or in each column of the unit cell. The image obtaining apparatus generate an electrical image signal corresponding to sensed light that has passed through the color filter array.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: December 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Chul Song, Won-Hee Choe, Seong-Deok Lee
  • Patent number: 9190003
    Abstract: A display apparatus includes a plurality of first gate lines extended in a first direction and disposed on a substrate on which a plurality of pixels is disposed, a plurality of second gate line extended in a second direction to cross the first gate lines, a plurality of data lines disposed substantially parallel to the first gate lines, and a first insulating layer disposed between the first gate lines and the second gate lines and provided with a plurality of via holes to expose a portion of a corresponding first gate line of the first gate lines. Each of the first gate lines makes contact with a corresponding second gate line of the second gate lines through a corresponding via hole of the via holes.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 17, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungman Kim, ManHong Na, Min-Chul Song, Junho Song, Eugene Lee, Sung-Hoon Lim, YoungJe Cho, Soojung Chae
  • Patent number: 9178038
    Abstract: A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the raised drain region of the transistor.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Seung-Chul Song, James W. Blatchford, Kwan-Yong Lim