Patents by Inventor In Chul Song

In Chul Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9178037
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: November 3, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chet Vernon Lenox, Seung-Chul Song, Brian K. Kirkpatrick
  • Publication number: 20150310352
    Abstract: Computerized systems and methods are disclosed for performing contextual classification of objects using supervised and unsupervised training. In accordance with one implementation, content reviewers may review training objects and submit supervised training data for preprocessing and analysis. The supervised training data may be preprocessed to identify key terms and phrases, such as by stemming, tokenization, or n-gram analysis, and form vectorized objects. The vectorized objects may be used to train one or more models for subsequent classification of objects. In certain implementations, preprocessing or training, among other steps, may be performed in parallel over multiple machines to improve efficiency. The disclosed systems and methods may be used in a wide variety of applications, such as article classification and content moderation.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Inventors: Thu KYAW, Sang Chul SONG, Vineet MAHAJAN, Elena HALICZER
  • Publication number: 20150311304
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 29, 2015
    Inventors: Chet Vernon LENOX, Seung-Chul SONG, Brian K. KIRKPATRICK
  • Publication number: 20150297682
    Abstract: The present disclosure relates to a method of treating cancer using a composition including a target-specific self-illuminative nanocomplex which includes an self-illuminative nanocomplex including a quantum dot and a modified self-illuminative protein (m-Rluc8), a targeted cancer-specific molecule and a hydrophilic polymer, and a method of preparing the composition. Since the high efficiency self-illuminative nanocomplex may have high target specificity by chemically binding to a target-specific molecule, it can be effectively used in cancer treatment using a nanometer-scale laser light source, and therefore it is expected to propose a new paradigm of nanoptic therapeutics.
    Type: Application
    Filed: April 16, 2015
    Publication date: October 22, 2015
    Applicant: Research & Business Foundation Sungkyunkwan University
    Inventors: Soong Ho UM, Woo Chul SONG
  • Publication number: 20150287647
    Abstract: An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is halogen-containing silicon nitride formed using a halogenated silane reagent. A second layer of the hard mask is silicon nitride formed on the first layer using halogen-free reagents. After source/drain cavities are etched in the PMOS transistors, a pre-epitaxial bake with hydrogen is performed. After SiGe epitaxial source/drain regions are formed, the hard mask is removed.
    Type: Application
    Filed: June 22, 2015
    Publication date: October 8, 2015
    Inventors: Deborah Jean RILEY, Seung-Chul SONG
  • Publication number: 20150278979
    Abstract: An automatic image selecting apparatus including an image receiver configured to receive an image; a feature extractor configured to extract a feature from the image; and a category determiner configured to determine whether the extracted feature matches predetermined category identification reference data used for determining whether to store the image.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 1, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yun Hong Min, In Chul Song, Ba Rom Jeon, Hee Youl Choi
  • Publication number: 20150279966
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventors: Chet Vernon LENOX, Seung-Chul SONG, Brian K. KIRKPATRICK
  • Patent number: 9139337
    Abstract: A round trip envelope with front and back faces for writing the outgoing and return addresses, and which enables sealing for both of outgoing mail and return mail sealing flap, which can prevent erroneous postmarking of a stamp. An outgoing stamp affixing area and address writing area are on the front face of the envelope body, and a return stamp affixing area and a return address writing area on the back face. An adhesive area for sealing a sealing flap in a blank area on the back face, in a vicinity of an opening. A distal end portion of the sealing flap extending beyond the adhesive area constitutes a return-mail sealing flap.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: September 22, 2015
    Assignee: SONG CO., LTD.
    Inventor: Koon Chul Song
  • Patent number: 9136283
    Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 15, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Min-Chul Song, Man Hong Na, Young Je Cho, Sung Man Kim, Sung-Hoon Lim, Soo Jung Chae, Eu Gene Lee
  • Patent number: 9116400
    Abstract: A liquid crystal display includes a first substrate including pixels arranged in m columns by n rows, n data lines disposed, m gate lines arranged substantially parallel to the data lines, n data distribution lines arranged to cross the m gate lines and electrically connected to the data lines, respectively, source driving chips disposed on a first portion of the first substrate, and a gate driver disposed on a second portion of the first substrate. Each of the data distribution lines is connected to a subset of the pixels arranged in a corresponding row, and each of the gate lines is connected to a subgroup of the pixels arranged in a corresponding column. The source driving chips apply data signals to the pixels through the first data lines and the data distribution lines, and the gate driver applies gate signals to the pixels through the gate lines.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: August 25, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Min-Chul Song, JungHoon Yoon, Sungman Kim, Jae Hwa Park, YoungJe Cho
  • Publication number: 20150234799
    Abstract: An apparatus and method of operating a text related function are provided. The apparatus includes receiving a selection of at least one text region from displayed text, determining at least one classification for one of the at least one text region and the character information based on a connection relationship between at least one piece of character information included in the at least one text region selected, and processing a text related function associated with the at least one piece of character information according to the determined at least one classification.
    Type: Application
    Filed: January 28, 2015
    Publication date: August 20, 2015
    Inventors: Guk Hwan CHO, Ki Chul SONG, Ji Woo LEE, In Soon KIM, Kyu Seok OH, Chul Ho YU
  • Publication number: 20150237457
    Abstract: An electronic device is provided. The electronic device includes a Subscriber Identity Module (SIM) card configured to store SIM information, a control module configured to combine the SIM information with stored address information on a server device to create combined address information, to control a connection with the server device based on the combined address information, and to control a reception of a list of applications comprising information related to application installation or update corresponding to a type of the SIM information, and a communication module configured to establish communication with the server device.
    Type: Application
    Filed: January 27, 2015
    Publication date: August 20, 2015
    Inventors: Chul Ho YU, Seung Kwon PARK, In Soon KIM, Ki Chul SONG, Ji Woo LEE
  • Patent number: 9104655
    Abstract: Computerized systems and methods are disclosed for performing contextual classification of objects using supervised and unsupervised training. In accordance with one implementation, content reviewers may review training objects and submit supervised training data for preprocessing and analysis. The supervised training data may be preprocessed to identify key terms and phrases, such as by stemming, tokenization, or n-gram analysis, and form vectorized objects. The vectorized objects may be used to train one or more models for subsequent classification of objects. In certain implementations, preprocessing or training, among other steps, may be performed in parallel over multiple machines to improve efficiency. The disclosed systems and methods may be used in a wide variety of applications, such as article classification and content moderation.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: August 11, 2015
    Assignee: AOL Inc.
    Inventors: Thu Kyaw, Sang Chul Song, Vineet Mahajan, Elena Haliczer
  • Patent number: 9091892
    Abstract: A liquid crystal display includes a first substrate, gate lines and data lines disposed on a display area of the first substrate, a common voltage line disposed on a peripheral area of the first substrate, a common voltage transmission unit extending from the common voltage line, an organic layer disposed on the common voltage transmission unit and the common voltage line, a connecting member disposed on the organic layer disposed on the peripheral area, a first insulating layer disposed on the pixel electrode and the connecting member, a common electrode disposed on the first insulating layer, and a short point connecting the connecting member and the common electrode to each other. The common electrode and the first insulating layer include a plurality of cutouts in the peripheral region and display region of the first substrate which have substantially a same plane shape as each other.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: July 28, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Man Kim, Yeong-Keun Kwon, Duk-Sung Kim, Min-Chul Song, Eu Gene Lee, Soo Jung Chae
  • Patent number: 9093555
    Abstract: An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is halogen-containing silicon nitride formed using a halogenated silane reagent. A second layer of the hard mask is silicon nitride formed on the first layer using halogen-free reagents. After source/drain cavities are etched in the PMOS transistors, a pre-epitaxial bake with hydrogen is performed. After SiGe epitaxial source/drain regions are formed, the hard mask is removed.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: July 28, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Deborah Jean Riley, Seung-Chul Song
  • Patent number: 9087917
    Abstract: An integrated circuit is formed by removing a sacrificial gate dielectric layer and a sacrificial gate to form a gate cavity. A conformal dielectric first liner is formed in the gate cavity and a conformal second liner is formed on the first liner. A first etch removes the second liner from the bottom of the gate cavity, leaving material of the second liner on sidewalls of the gate cavity. A second etch removes the first liner from the bottom of the gate cavity exposed by the second liner, leaving material of the first liner on the bottom of the gate cavity under the second liner on the sidewalls of the gate cavity. A third etch removes the second liner from the gate cavity, leaving an L-shaped spacers of the first liner in the gate cavity. A permanent gate dielectric layer and replacement gate are formed in the gate cavity.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: July 21, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chet Vernon Lenox, Seung-Chul Song, Brian K. Kirkpatrick
  • Publication number: 20150198854
    Abstract: A liquid crystal display includes a first substrate including pixels arranged in m columns by n rows, n data lines disposed, m gate lines arranged substantially parallel to the data lines, n data distribution lines arranged to cross the m gate lines and electrically connected to the data lines, respectively, source driving chips disposed on a first portion of the first substrate, and a gate driver disposed on a second portion of the first substrate. Each of the data distribution lines is connected to a subset of the pixels arranged in a corresponding row, and each of the gate lines is connected to a subgroup of the pixels arranged in a corresponding column. The source driving chips apply data signals to the pixels through the first data lines and the data distribution lines, and the gate driver applies gate signals to the pixels through the gate lines.
    Type: Application
    Filed: March 24, 2015
    Publication date: July 16, 2015
    Inventors: Min-Chul SONG, JungHoon YOON, SUNGMAN KIM, Jae Hwa PARK, YoungJe CHO
  • Publication number: 20150140769
    Abstract: A raised source/drain MOS transistor is formed in a process that utilizes a first sidewall spacer when implanting a semiconductor region to form the heavily-doped source region and the heavily-doped drain region of the transistor, and a second different sidewall spacer when epitaxially growing the raised source region and the raised drain region of the transistor.
    Type: Application
    Filed: January 29, 2015
    Publication date: May 21, 2015
    Inventors: Seung-Chul Song, James W. Blatchford, Kwan-Yong Lim
  • Patent number: 9025124
    Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: May 5, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Man Kim, Jun-Ho Song, Man-Hong Na, Young-Je Cho, Hoon Kang, Sung-Hoon Lim, Min-Chul Song, Soo-Jung Chae, Eu-Gene Lee
  • Publication number: 20150084598
    Abstract: A battery system is disclosed. In one aspect, the battery system includes a plurality of battery trays including at least one battery cell, a plurality of slave BMSs for controlling the battery trays, and a master BMS for controlling the slave BMSs. Each slave BMS includes a switch for generating a pulse signal according to an input, a display for displaying a status of the battery tray, and a controller. The controller determines an operation mode of the slave BMS according to the pulse width of the pulse signal, sets an identifier (ID) of the slave BMS according to the number of generated pulse signals, and displays the ID of the slave BMS on the display.
    Type: Application
    Filed: March 24, 2014
    Publication date: March 26, 2015
    Applicant: Samsung SDI Co., Ltd.
    Inventor: Hyun-Chul Song