Abstract: A method for producing self-aligned silicidation, substantially facilitating the integration of the high-voltage and low-voltage MOS device, is disclosed. The method includes providing, the present invention provides a integration of high-voltage and low-voltage MOS transistor, which self-aligned silicidation process. A substrate is provided incorporating a device, wherein the device is defined high-voltage MOS region and low-voltage MOS region. Sequentially, a plurality of field oxides are formed on the substrate, one of the field oxide is spaced from another of the field oxide by a MOS region. Moreover, a polysilicon layer is formed over said high-voltage MOS region and low-voltage MOS region, and a first dielectric layer is deposited above the polysilicon layer of the high-voltage MOS region and low-voltage MOS region.

Abstract: A method for forming bipolar junction transistor with high gain via formulation of high voltage device in deep submicron process is disclosed. A substrate including a first part, a second part, and a third part is primarily provided; then, a first well in the first part and a second well in the second part are formed. A plurality of field oxide regions are formed on said substrate; subsequently, two third wells are formed in said third part. The following steps are to form a fourth well in said first well in said first part and two fifth wells in said second well in said second part; and to form a first gate on said first part between said two third wells, and a second gate on said second part between said two fifth wells. Next, a first spacer against said first gate and a second spacer against said second gate are formed. Further, first ions are introduced into said first part to serve as a collector region, and into said third part to serve as a first source/drain region.