Abstract: Provided herein may be a semiconductor memory device and a method of operating the semiconductor memory device to program a selected physical page of the semiconductor memory device. The method may include performing a plurality of program loops. Each of the program loops may include: applying a bit line voltage based on data input to a page buffer of the semiconductor memory device; applying a two-step program pulse to a word line coupled to the selected physical page; performing a program verify operation on the selected physical page using a double verify scheme; and determining a bit line voltage to be applied in a subsequent program loop based on a result of the program verify operation.

Abstract: Provided herein may be a semiconductor memory device and a method of operating the semiconductor memory device to program a selected physical page of the semiconductor memory device. The method may include performing a plurality of program loops. Each of the program loops may include: applying a bit line voltage based on data input to a page buffer of the semiconductor memory device; applying a two-step program pulse to a word line coupled to the selected physical page; performing a program verify operation on the selected physical page using a double verify scheme; and determining a bit line voltage to be applied in a subsequent program loop based on a result of the program verify operation.

Abstract: Provided herein may be a memory device and a method of operating the same. The memory device may include a memory cell array, a plurality of page buffer groups, and a program operation controller. The memory cell array may include a plurality of memory cells. The page buffer groups may be coupled to the plurality of memory cells through a plurality of bit line groups, and may be configured to perform bit line precharge operations on the plurality of bit line groups. The program operation controller may be configured to control the plurality of page buffer groups to perform the bit line precharge operations initiated at different time points during a program operation on the plurality of memory cells, and to adjust an interval between initiation time points of the bit line precharge operations depending on a progress of the program operation.

Abstract: Provided herein may be a semiconductor memory device and a method of operating the semiconductor memory device to program a selected physical page of the semiconductor memory device. The method may include performing a plurality of program loops. Each of the program loops may include: applying a bit line voltage based on data input to a page buffer of the semiconductor memory device; applying a two-step program pulse to a word line coupled to the selected physical page; performing a program verify operation on the selected physical page using a double verify scheme; and determining a bit line voltage to be applied in a subsequent program loop based on a result of the program verify operation.

Abstract: Provided is a device for detecting a defect of an optical film, comprising a light emitting unit, a reflection unit, a screen, and an image capturing unit, and a method for detecting a defect of an optical film, comprising emitting light to a reflection unit, projecting the light reflected by the reflection unit onto an optical film, capturing an image of a screen which displays a projection shape obtained by projecting the light onto the optical film, and analyzing the image.

Abstract: The present disclosure relates to a system and a method of detecting a defect of an optical film, and more particularly, to a system and a method of detecting a defect of an optical film, which obtain an image of a defect of an optical film projected onto a screen and detect the defect of the optical film. As an exemplary embodiment of the present disclosure, a system for detecting a defect of an optical film may be provided.

Abstract: Provided herein may be a semiconductor memory device and a method of operating the semiconductor memory device to program a selected physical page of the semiconductor memory device. The method may include performing a plurality of program loops. Each of the program loops may include: applying a bit line voltage based on data input to a page buffer of the semiconductor memory device; applying a two-step program pulse to a word line coupled to the selected physical page; performing a program verify operation on the selected physical page using a double verify scheme; and determining a bit line voltage to be applied in a subsequent program loop based on a result of the program verify operation.

Abstract: Provided herein are a page buffer and a memory device having the same. The page buffer may include: a latch circuit comprising a first node configured to be set to a first level in response to a sense amplifier strobe signal when an operation of setting up a bit line is performed during a program operation of a semiconductor memory device; a current control circuit configured to supply an internal power to a current sensing node depending on a value of the first level of the first node; and a page buffer sensing circuit configured to couple the bit line to the current sensing node in response to a page buffer sensing signal and control a potential level of the bit line depending on a potential level of the page buffer sensing signal.

Abstract: Provided herein are a page buffer and a memory device having the same. The page buffer may include: a latch circuit comprising a first node configured to be set to a first level in response to a sense amplifier strobe signal when an operation of setting up a bit line is performed during a program operation of a semiconductor memory device; a current control circuit configured to supply an internal power to a current sensing node depending on a value of the first level of the first node; and a page buffer sensing circuit configured to couple the bit line to the current sensing node in response to a page buffer sensing signal and control a potential level of the bit line depending on a potential level of the page buffer sensing signal.

Abstract: A semiconductor memory device is disclosed. The semiconductor memory device includes a current mirror configured to include a current mirror section for current of a first line to a second line and transistors coupled in parallel, a detector configured to control a voltage of the first line based on voltages of sensing nodes, a fail bit set section configured to control a voltage of the second line, and a comparator configured to compare the voltage of the first line with the voltage of the second line and generate a pass and fail check signal based on the comparing result.

Abstract: A semiconductor memory device is disclosed. The semiconductor memory device includes a current mirror configured to include a current mirror section for current of a first line to a second line and transistors coupled in parallel, a detector configured to control a voltage of the first line based on voltages of sensing nodes, a fail bit set section configured to control a voltage of the second line, and a comparator configured to compare the voltage of the first line with the voltage of the second line and generate a pass and fail check signal based on the comparing result.

Abstract: A semiconductor memory device is disclosed. The semiconductor memory device includes a current mirror configured to include a current mirror section for current of a first line to a second line and transistors coupled in parallel, a detector configured to control a voltage of the first line based on voltages of sensing nodes, a fail bit set section configured to control a voltage of the second line, and a comparator configured to compare the voltage of the first line with the voltage of the second line and generate a pass and fail check signal based on the comparing result.

Abstract: A semiconductor memory device includes a memory cell array configured to include memory cells, peripheral circuits configured to read out data stored in a selected memory cell in a read operation, and a controller configured to control the peripheral circuits so that the peripheral circuits sense a voltage level of the bit line when a first read voltage of the read voltages is supplied to the word line and the peripheral circuits sense voltage levels of the bit line when a second read voltage lower than the first read voltage by a specific level and a third read voltage higher than the first read voltage by the specific level are supplied to the word line in order to determine whether a threshold voltage of the selected memory cell falls within a set voltage distribution in the read operation.

Abstract: A semiconductor memory device is disclosed. The semiconductor memory device includes a current mirror configured to include a current mirror section for current of a first line to a second line and transistors coupled in parallel, a detector configured to control a voltage of the first line based on voltages of sensing nodes, a fail bit set section configured to control a voltage of the second line, and a comparator configured to compare the voltage of the first line with the voltage of the second line and generate a pass and fail check signal based on the comparing result.

Abstract: A semiconductor memory device includes a memory cell array configured to include memory cells, peripheral circuits configured to read out data stored in a selected memory cell in a read operation, and a controller configured to control the peripheral circuits so that the peripheral circuits sense a voltage level of the bit line when a first read voltage of the read voltages is supplied to the word line and the peripheral circuits sense voltage levels of the bit line when a second read voltage lower than the first read voltage by a specific level and a third read voltage higher than the first read voltage by the specific level are supplied to the word line in order to determine whether a threshold voltage of the selected memory cell falls within a set voltage distribution in the read operation.

Abstract: The present invention relates to an apparatus and a method for operating and controlling a display and a backlight in the portable terminals, and more particularly, to an apparatus and a method for controlling the backlight and the display without a key input. The present invention the steps of: generating a sensing signal and transmitting the sensing signal to a control means, wherein the sensing signal is issued by an action taken by a user; receiving the sensing signal in the control means and generating a control signal; and turning on a backlight in response to the control signal. Accordingly, an unnecessary key input is removed in turning on the backlight and in rotating the output pattern of the phone.

Abstract: Disclosed is a removal unit for removing metallic alien materials, which is adapted to remove metallic alien materials such as metal fragments contained in powder or liquid raw materials. The removal unit includes an outer plate, an inner plate spaced apart from the outer plate, and magnet members coupled between the inner and outer plates. Each magnet member includes a cylindrical stainless steel rod, a magnet received in the stainless steel rod to extend from one end of the stainless steel rod to at least an intermediate portion of the stainless steel rod, a non-magnetic piece received in the other end of the stainless steel rod and coupled to the outer plate, and a fluorine resin coating formed over an outer peripheral surface of the stainless steel rod. A removal member is arranged to be slidable in a longitudinal direction along the magnet members while being in contact with the outer peripheral surfaces of the magnet members.

Abstract: The present invention relates to a portable terminal, such a hand-held phone, a smart phone or a PDA (personal digital assistant); and more particularly, to a portable terminal providing various vibrations for a user in response to different input event thereof. The portable terminal according to the present invention has a receiver for receiving a calling signal and external signals; a feature extractor for extracting a feature of the calling signal or the external signals; and only one vibration motor having an eccentrically balanced weight which is fixed at an end of the axis thereof, wherein the one vibration motor and the eccentrically balanced weight are controlled by a control signal from the Feature extractor and wherein the control signal is issued by the an extracted feature of the external signals. Although the present invention uses only one vibration motor, a behavior of the phone may have different vibration traces.

Abstract: Disclosed is a removal unit for removing metallic alien materials, which is adapted to remove metallic alien materials such as metal fragments contained in powder or liquid raw materials. The removal unit includes an outer plate, an inner plate spaced apart from the outer plate, and magnet members coupled between the inner and outer plates. Each magnet member includes a cylindrical stainless steel rod, a magnet received in the stainless steel rod to extend from one end of the stainless steel rod to at least an intermediate portion of the stainless steel rod, a non-magnetic piece received in the other end of the stainless steel rod and coupled to the outer plate, and a fluorine resin coating formed over an outer peripheral surface of the stainless steel rod. A removal member is arranged to be slidable in a longitudinal direction along the magnet members while being in contact with the outer peripheral surfaces of the magnet members.