Abstract: The present invention relates to a display device using a microelectromechanical system (MEMS) and to a manufacturing method thereof. A display device using a MEMS includes a first substrate comprising a first index of refraction; a second substrate facing the first substrate; a reflective layer formed on the first substrate and having a first aperture; a transparent layer covering the first aperture and comprising a second refractive index; and a shutter arranged on the second substrate, wherein a difference between the first refractive index and the second refractive index is equal to or less than 0.1.

Abstract: A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The first optical unit makes the laser beam have a transverse edge and a longitudinal edge longer than the transverse edge, and the second optical unit makes the laser beam have a transverse edge and a longitudinal edge shorter than the transverse edge.

Abstract: Disclosed is a method for manufacturing fine patterns of semiconductor devices using a double exposure patterning process for manufacturing the second photoresist patterns by simply exposing without an exposure mask. The method comprises the steps of: forming a first photoresist pattern on a semiconductor substrate on which a layer to be etched is formed; coating a composition for a mirror interlayer on the first photoresist pattern to form a mirror interlayer; forming a photoresist layer on the resultant; and forming a second photoresist pattern which is made by a scattered reflection of the mirror-interlayer and positioned between the first photoresist patterns, by exposing the photoresist layer to a light having energy which is lower than a threshold energy (Eth) of the photoresist layer without an exposure mask, and then developing the same.

Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.

Abstract: A photosensitive compound whose size is smaller than conventional polymer for photoresist, and which has well-defined (uniform) structure, and a photoresist composition including the same are disclosed. The photosensitive compound represented by the following formula. Also, the present invention provides a photoresist composition comprising 1 to 85 wt % (weight %) of the photosensitive compound; 0.05 to weight parts of a photo-acid generator with respect to 100 weight parts of the photosensitive compound; and 10 to 5000 weight parts of an organic solvent. In the formula, n is 0 or 1, x is 1, 2, 3, 4 or 5, y is 2, 3, 4, 5 or 6, z is 0, 1, 2, 3 or 4, R, R? and R? are independently hydrocarbon group of 1 to 30 carbon atoms, preferably 2 to 20 carbon atoms, and R?? is a hydrogen atom or hydrocarbon group of 1 to 30 carbon atoms, preferably 2 to 20 carbon atoms.

Abstract: The present invention provides a method of generating a pseudo-3D user-adapted avatar by using artificial intelligence based on a method of converting a 2D image to the pseudo-3D image having visual and partial functions of a 3D model, and a method of performing a coordination simulation by applying the pseudo-3D coordination image generated by applying total clothes coordination information derived from the artificial intelligence to a user-adapted avatar. The pseudo-3D user-adapted avatar is generated by receiving primary size information and deriving secondary size information from an algorithm by using the primary size information. The pseudo-3D user-adapted avatar image suitable to the user's body shape is generated from the 2D standard avatar image.

Abstract: An analog buffer, display device having the same and a method of driving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.

Abstract: A photosensitive compound whose size is smaller than conventional polymer for photoresist, and which has well-defined (uniform) structure, and a photoresist composition including the same are disclosed. The photosensitive compound represented by the following formula 1. Also, the photoresist composition comprises 1 to 85 wt % (weight %) of the photosensitive compound; 0.05 to 15 weight parts of a photo-acid generator with respect to 100 weight parts of the photosensitive compound; and 200 to 5000 weight parts of an organic solvent. In the formula 1, x is 1, 2, 3, 4 or 5, y is 2, 3, 4, 5 or 6, and R and R? are independently a chain type or a ring type of aliphatic or aromatic hydrocarbon group of 1 to 30 carbon atoms.

Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.

Abstract: A plurality laser beams generated by a plurality of beam generators are synthesized by a beam synthesizer. The synthesized beam is splitted into a plurality of beamlets and provided for a plurality of optical units controlling the beamlets. Each beamlet controlled by each optical unit is illuminated onto an amorphous silicon layer deposited on a substrate that is mounted on a plurality of stages to be polycrystallized.

Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.

Abstract: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.

Abstract: A silicon crystallization system includes a beam generator generating a laser beam, first and second optical units for controlling the laser beam from the beam generator; and a stage for mounting a panel including an amorphous silicon layer to be polycrystallized by the laser beam from the optical units. The first optical unit makes the laser beam have a transverse edge and a longitudinal edge longer than the transverse edge, and the second optical unit makes the laser beam have a transverse edge and a longitudinal edge shorter than the transverse edge.

Abstract: A thin film transistor array panel is provided, which includes: a substrate including a plurality of pixel areas; a semiconductor layer formed on the substrate and including a plurality of pairs of first and second semiconductor portions in respective pixel areas; a first insulating layer formed on the semiconductor layer; a gate wire formed on the first insulating layer; a second insulating layer formed on the gate wire; a data wire formed on the second insulating layer; a third insulating layer formed on the data wire; a pixel electrode formed on the third insulating layer and connected to the data wire, wherein width and length of at least one of the first and the second semiconductor portions vary between at least two pixel areas.

Abstract: An analog buffer, display device having the same and a method of drving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.

Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.

Abstract: A crystallization mask for laser illumination for converting amorphous silicon into polysilicon is provided, which includes: a plurality of transmissive areas having a plurality of first slits for adjusting energy of the laser illumination passing through the mask; and an opaque area.

Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: depositing an amorphous silicon layer on an insulating substrate; converting the amorphous silicon layer to a polysilicon layer by a plurality of laser shots using a mask; forming a gate insulating layer on the polysilicon layer; forming a plurality of gate lines on the gate insulating layer; forming a first interlayer insulating layer on the gate lines; forming a plurality of data lines on the first interlayer insulating layer; forming a second interlayer insulating layer on the data lines; and forming a plurality of pixel electrodes on the second interlayer insulating layer, wherein the mask comprises a plurality of transmitting areas and a plurality of blocking areas arranged in a mixed manner.