Patents by Inventor In Hee Cho

In Hee Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402231
    Abstract: A capacitor including a first thin-film electrode layer, a second thin-film electrode layer, a dielectric layer between the first and second thin-film electrode layers, and a first interlayer between the first thin-film electrode layer and the dielectric layer and/or between the second thin-film electrode layer and the dielectric layer may be provided. The first interlayer includes first metal oxide, at least one of the first and second thin-film electrode layers includes second metal having a conductive rutile crystal structure, the second metal oxide includes non-noble metal, the dielectric layer includes third metal oxide having a dielectric rutile crystal structure, and the first metal oxide, the second metal oxide, and third metal oxide have different compositions from each other, the first metal oxide includes GeO2, the third metal oxide includes TiO2, and a thickness of the first interlayer is smaller than that of the dielectric layer.
    Type: Application
    Filed: May 5, 2023
    Publication date: December 14, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jinhong Kim, Changsoo Lee, Cheheung Kim, Jooho Lee, Yong-Hee Cho
  • Patent number: 11843795
    Abstract: An inter prediction method according to the present invention comprises the steps of: selecting candidate units from among reconstructed neighbor units; creating a candidate unit set with respect to units to be decoded, using the selected candidate units; determining a reference unit from among the candidate units which constitute the created candidate unit set; and performing inter prediction on the units to be decoded, using the determined reference unit. According to the present invention, image encoding/decoding efficiency can be improved.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: December 12, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Hui Yong Kim, Se Yoon Jeong, Suk Hee Cho, Jong Ho Kim, Ha Hyun Lee, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim, Chie Teuk Ahn
  • Patent number: 11842336
    Abstract: A method for identifying a wallet address associated with a virtual asset service provider is provided. The method comprises receiving a target wallet address, obtaining a transaction of a virtual asset associated with the target wallet address, obtaining a list of a plurality of known wallet addresses of virtual asset service providers (VASPs) and identifying a type of the target wallet address, by performing at least one of a cold wallet determination routine and a hot wallet determination routine for the target wallet address, based on the transaction and the list of known wallet addresses of the VASPs.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: December 12, 2023
    Assignees: KOREA INTERNET & SECURITY AGENCY, Lambda256, CO., LTD
    Inventors: Yong Hee Shin, Moon Hee Cho, Kyeong Han Kim, Dae Il Jang, Seung Goo Ji, Jae Hoon Oh
  • Publication number: 20230389257
    Abstract: A semiconductor device includes a substrate, a lower active pattern which is spaced apart from the substrate and extends in a first direction, an upper active pattern on the lower active pattern, the upper active pattern being spaced apart from the lower active pattern and extending in the first direction, a gate structure on the substrate, the gate structure extending in a second direction intersecting the first direction, and a cutting pattern on the substrate, the cutting pattern extending in the first direction to cut the gate structure. The gate structure includes a lower gate electrode through which the lower active pattern penetrates, an upper gate electrode which is connected to the lower gate electrode and through which the upper active pattern penetrates, and an insulating pattern on one side of the cutting pattern, the insulating pattern being arranged with the upper gate electrode along the second direction.
    Type: Application
    Filed: December 7, 2022
    Publication date: November 30, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Min SONG, Hyo-Jin KIM, Kyung Hee CHO
  • Publication number: 20230389290
    Abstract: A semiconductor device includes a first single crystal semiconductor pattern including a first source/drain region, a second source/drain region, and a first vertical channel region between the first source/drain region and the second source/drain region, the second source/drain region being at a higher level than the first source/drain region; a first gate electrode facing a first side surface of the first single crystal semiconductor pattern; a first gate dielectric layer, the first gate dielectric layer including a portion between the first single crystal semiconductor pattern and the first gate electrode; and a complementary structure in contact with a second side surface of the first single crystal semiconductor pattern, wherein the complementary structure includes an oxide semiconductor layer.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 30, 2023
    Inventors: Jeonil LEE, Kyunghwan LEE, Min Hee CHO
  • Publication number: 20230377639
    Abstract: An SRAM comprises: a memory cell array in which a plurality of memory cells each defined by a word line and a bit line pair are arranged; a write driver that applies a write voltage corresponding to the applied data to a bit line pair connected to the memory cell; and a word line driver activating the word line after the write voltage is applied to the bit line pair and after a pre-develop period.
    Type: Application
    Filed: February 14, 2023
    Publication date: November 23, 2023
    Inventors: Seong Ook JUNG, Keon Hee CHO, Ji Sang OH, Min June YEO
  • Publication number: 20230371374
    Abstract: The present disclosure relates to a plurality of host materials comprising a first host compound represented by formula 1 and a second host compound represented by formula 2 and an organic electroluminescent device comprising the same. By comprising the specific combination of the compound according to the present disclosure as host materials, an organic electroluminescent device having low driving voltage and/or high luminous efficiency and/or significantly improved lifespan characteristics can be provided.
    Type: Application
    Filed: May 1, 2023
    Publication date: November 16, 2023
    Inventors: Sang-Hee CHO, Young-Jae KIM, Hae-Yeon KIM, So-Young JUNG, Su-Hyun LEE, Mi-Ja LEE, So-Mi PARK, Young-Gil KIM, Hong-Se OH, Hyo-Soon PARK
  • Publication number: 20230364656
    Abstract: The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes discharging a treating liquid including a polymer and a solvent onto a substrate; and solidifying a liquid film of the treating liquid by volatilizing the solvent from the treating liquid on the substrate, and wherein the solidifying a liquid film comprises a first period of stopping the rotation of the substrate or rotating the substrate at a first speed for a first time period.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 16, 2023
    Applicant: SEMES CO., LTD.
    Inventors: Tae-Keun KIM, Kyeong Min LEE, Min Hee CHO, Won Young KANG
  • Patent number: 11817475
    Abstract: A semiconductor device includes a first electrode; a second electrode which is apart from the first electrode; and a dielectric layer between the first electrode and the second electrode. The dielectric layer may include a base material including an oxide of a base metal, the base material having a dielectric constant of about 20 to about 70, and co-dopants including a Group 3 element and a Group 5 element. The Group 3 element may include Sc, Y, B, Al, Ga, In, and/or Tl, and the Group 5 element may include V, Nb, Ta, N, P, As, Sb, and/or Bi.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: November 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaeho Lee, Yong-Hee Cho, Seungwoo Jang, Younggeun Park, Jooho Lee
  • Patent number: 11813552
    Abstract: The present invention relates to a dispersion device and a defoamation device comprising the same, which provides a dispersion device comprising a dispersion plate equipped with an inclined surface extended downwards obliquely and raw material inflow nozzles formed on the inclined surface to introduce a raw material into the inclined surface; and a band spaced apart from the inclined surface of the dispersion plate to form a gap from the inclined surface, thereby being configured so that the raw material flows through the gap.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: November 14, 2023
    Inventors: Jung Kee Jang, Jeong Hun Cho, Joon Hee Cho, Ye Hoon Im, Young Soo Song
  • Patent number: 11812012
    Abstract: Provided are an image encoding method and device. When carrying out image encoding for a block within a slice, at least one block in a restored block of the slice is set as a reference block. When this is done, the encoding parameters of the reference block are distinguished, and the block to be encoded is encoded adaptively based on the encoding parameters.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: November 7, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jong Ho Kim, Hae Chul Choi, Hui Yong Kim, Ha Hyun Lee, Jin Ho Lee, Se Yoon Jeong, Suk Hee Cho, Jin Soo Choi, Jin Woo Hong, Jin Woong Kim
  • Patent number: 11812601
    Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: November 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun Goo Kang, Sang Hyuck Ahn, Sang Yeol Kang, Jin-Su Lee, Hyun-Suk Lee, Gi Hee Cho, Hong Sik Chae
  • Publication number: 20230354520
    Abstract: A printed circuit board includes a first insulating layer, a metal pad including a first metal portion disposed on the first insulating layer, and a second metal portion disposed on the first metal portion and integrated with the first metal portion without a boundary therebetween, the second metal portion having a width narrower than a width of the first metal portion on a cross section, a second insulating layer disposed on the first insulating layer and covering at least a portion of a side surface of the first metal portion, and a surface metal layer disposed on the metal pad and covering at least a portion of each of an upper surface and a side surface of the second metal portion.
    Type: Application
    Filed: November 9, 2022
    Publication date: November 2, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chan Hoon KO, Ki Hee CHO, Sang Hoon KIM
  • Publication number: 20230354582
    Abstract: A semiconductor device may include a bit line extending in a first direction, a semiconductor pattern on the bit line, the semiconductor pattern including first and second vertical portions, which are opposite to each other in the first direction, and a horizontal portion connecting the first and second vertical portions, first and second word lines on the horizontal portion to be adjacent to the first and second vertical portions, respectively, and a gate insulating pattern between the first vertical portion and the first word line and between the second vertical portion and the second word line. A bottom surface of the horizontal portion may be located at a height that is lower than or equal to the uppermost surface of the bit line.
    Type: Application
    Filed: December 7, 2022
    Publication date: November 2, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kiseok Lee, Byeongjoo Ku, Keunnam Kim, Wonsok Lee, Moonyoung Jeong, Min Hee Cho
  • Publication number: 20230347736
    Abstract: A torque control apparatus may include an input device, a driving device, a memory, and a controller. For example, the torque control apparatus may be configured to obtain an input related to acceleration of the host vehicle from a user by use of the input device, to determine user requirement torque based on the input, to generate a first requirement torque to be input to the driving device for the acceleration of the host vehicle based on at least part of the user requirement torque, to generate an estimation rate value through the first requirement torque by use of a pitch rate estimation model, and to generate a second requirement torque by use of at least one of the estimation rate value, a requirement rate value, the user requirement torque, or a combination of the estimation rate value, the requirement rate value, and the user requirement torque.
    Type: Application
    Filed: July 6, 2023
    Publication date: November 2, 2023
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Young Sun NAM, Chang Hee CHO, Chang Hwan KIM, In Kyu LEE, Jae Ho LEE, Doo Hyun KIM, Sung Hoon YU, Lee Hyoung CHO, Nam Kwon LEE, Young Eun KIM, Jong Wha KIM, Ye Chan JEONG, Beom Jun PARK, Hyun KIM, Sang Joon KIM
  • Publication number: 20230353774
    Abstract: An inter prediction method according to the present invention comprises: a step for deriving reference motion information related to a unit to be decoded in a current picture; and a step for performing motion compensation for the unit to be decoded, using the reference motion information that has been derived. According to the present invention, image encoding/decoding efficiency can be enhanced.
    Type: Application
    Filed: July 5, 2023
    Publication date: November 2, 2023
    Inventors: Sung Chang LIM, Hui Yong KIM, Se Yoon JEONG, Suk Hee CHO, Jong Ho KIM, Ha Hyun LEE, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN
  • Patent number: 11805243
    Abstract: Provided are an image encoding method and device. When carrying out image encoding for a block within a slice, at least one block in a restored block of the slice is set as a reference block. When this is done, the encoding parameters of the reference block are distinguished, and the block to be encoded is encoded adaptively based on the encoding parameters.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: October 31, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jong Ho Kim, Hae Chui Choi, Hui Yong Kim, Ha Hyun Lee, Jin Ho Lee, Se Yoon Jeong, Suk Hee Cho, Jin Soo Choi, Jin Woo Hong, Jin Woong Kim
  • Publication number: 20230343964
    Abstract: A method for preparing a silicon anode active material in which a nano-silicon mixture is inserted into pores of coffee grounds according to the present disclosure can contribute to the protection of the natural environment through the preparation of a high-capacity silicon anode active material for a lithium secondary battery, which is prepared using coffee grounds that are an environmental pollutant, and has an effect of lowering the preparation cost of a lithium secondary battery anode material with the high-capacity silicon anode active material using coffee grounds by including the steps of: a) preparing nano-silicon; b) preparing an anionic surfactant; c) preparing silane; d) preparing a mixed dispersion based on ultrapure distilled water; e) drying and preparing coffee grounds; f) mixing polyvinyl alcohol into a mixed dispersion; g) mixing polyamic acid into the mixed dispersion; h) mixing graphite into the mixed dispersion; i) mixing vegetable oil into the mixed dispersion; j) final mixed dispersion h
    Type: Application
    Filed: April 21, 2023
    Publication date: October 26, 2023
    Applicant: MAGNATECH CO., LTD.
    Inventors: Dong-Whan Kim, Young-Hee Cho, Seong-Yong Kang, Jin-Pyo Lee, Jun-Pyo Park
  • Publication number: 20230345827
    Abstract: The present disclosure relates to a plurality of host materials comprising a first host material having a compound represented by formula 1, and a second host material having a compound represented by formula 2, and an organic electroluminescent device comprising the same. By comprising a specific combination of compounds of the present disclosure as host materials, it is possible to provide an organic electroluminescent device having long lifetime properties while having an equivalent or improved level of power efficiency compared to conventional organic electroluminescent devices.
    Type: Application
    Filed: November 17, 2022
    Publication date: October 26, 2023
    Inventors: Bitnari KIM, Doo-Hyeon MOON, Su-Hyun LEE, Du-Yong PARK, So-Young JUNG, Hae-Yeon KIM, Sang-Hee CHO
  • Patent number: 11797617
    Abstract: A method for collecting dark web information is provided. The method for collecting dark web information is performed by a computing device and comprises obtaining a list of onion addresses of a plurality of target dark web sites, accessing at least one of the plurality of target dark web sites, collecting web page information of the accessed dark web site, storing information on the accessed dark web site by analyzing the collected web page information and providing an analysis result of the accessed dark web site by using the stored information on the accessed dark web site.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: October 24, 2023
    Assignee: KOREA INTERNET & SECURITY AGENCY
    Inventors: Kyeong Han Kim, Moon Hee Cho, Yong Hee Shin