Patents by Inventor In-kyeong Yoo

In-kyeong Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10503046
    Abstract: An acousto-optic device capable of increasing a range of a diffraction angle of output light by using a nanostructured acousto-optic medium, and an optical scanner, an optical modulator, a two-dimensional/three-dimensional (2D/3D) conversion stereoscopic image display apparatus, and a holographic display apparatus using the acousto-optic device. The acousto-optic device may include a nanostructured acousto-optic medium formed by at least two different mediums repeatedly alternating with each other, wherein at least one of the at least two different mediums includes an acousto-optic medium. The acousto-optic device having the aforementioned structure may increase the range of a diffraction angle of output light.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: December 10, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-hoon Han, In-kyeong Yoo, Sang-yoon Lee, Hong-seok Lee, Moon Gyu Han, Sun-kook Kim
  • Publication number: 20190288039
    Abstract: A multi-level synaptic weight device having a 3D vertical cross-point structure according to an embodiment includes a multi-level conductance structure configured to couple any one of multiple word lines to any one of multiple bit lines. The conductance structure may include a multiplexer, configured to include multiple selector switches coupled in parallel to the word line and to select any one of the multiple parallel-coupled selector switches in response to an externally applied selection signal; a fixed resistor block including multiple fixed resistors coupled to the bit line; a cross-point block configured such that the multiple selector switches in the multiplexer and the multiple fixed resistors in the fixed resistor block intersect in a matrix form so as to be coupled to each other and each of the selector switches in the multiplexer has a unique number of cross-points; and a conductive plate on the fixed resistor block.
    Type: Application
    Filed: August 1, 2018
    Publication date: September 19, 2019
    Inventors: Seungyeol OH, In Kyeong YOO, Hyunsang HWANG
  • Patent number: 10418417
    Abstract: A multi-level synaptic weight device having a 3D vertical cross-point structure according to an embodiment includes a multi-level conductance structure configured to couple any one of multiple word lines to any one of multiple bit lines. The conductance structure may include a multiplexer, configured to include multiple selector switches coupled in parallel to the word line and to select any one of the multiple parallel-coupled selector switches in response to an externally applied selection signal; a fixed resistor block including multiple fixed resistors coupled to the bit line; a cross-point block configured such that the multiple selector switches in the multiplexer and the multiple fixed resistors in the fixed resistor block intersect in a matrix form so as to be coupled to each other and each of the selector switches in the multiplexer has a unique number of cross-points; and a conductive plate on the fixed resistor block.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: September 17, 2019
    Assignee: SK hynix Inc.
    Inventors: Seungyeol Oh, In Kyeong Yoo, Hyunsang Hwang
  • Publication number: 20190218340
    Abstract: A battery case comprising a container configured to house an electrode assembly, wherein the container includes a bottom wall and a plurality of side walls, the bottom wall and the plurality of side walls are integrated to define an internal space for housing the electrode assembly and to further define a top opening on an opposing side from the bottom wall, at least one of the bottom wall and the plurality of side walls comprises a liquid crystal aromatic poly(ester amide), and the battery case has a water vapor transmission rate (WVTR) at a wall thickness of 1 millimeter of less than or equal to about 0.07 grams per square meter per day, as measured at 38° C. and a relative humidity of 100% according to ISO 15106 or ASTM F1249.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 18, 2019
    Inventors: Joungeun YOO, In Ki KIM, Kyeong PANG, In KIM, Feifei FANG, In Su LEE, Hyoungwoo CHOI
  • Publication number: 20190190055
    Abstract: A battery casing including a container configured to house an electrode assembly, wherein the container includes a bottom wall and a plurality of side walls, the bottom wall and the plurality of side walls are integrated to define an open side opposite to the bottom wall and to define a space for housing the electrode assembly, at least one of the bottom wall and plurality of the side walls includes a composite including a thermotropic liquid crystal polymer and a nanoclay dispersed in the thermotropic liquid crystal polymer, wherein the main chain of the thermotropic liquid crystal polymer includes an aromatic oxycarbonyl repeating unit and an alkylene moiety-containing repeating unit, and at least a portion of the nanoclay is present in an exfoliated state, and an X-ray diffraction pattern of the composite does not exhibit an intrinsic peak corresponding to the nanoclay.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 20, 2019
    Inventors: Feifei FANG, In Ki KIM, Kyeong PANG, Joungeun YOO, In Su LEE, Ginam KIM, In KIM, Hyoungwoo CHOI
  • Publication number: 20190165336
    Abstract: A battery case comprising a container configured to house an electrode assembly, wherein the container comprises a bottom wall and a plurality of side walls, the bottom wall and the plurality of side walls are integrated to define an internal space for housing the electrode assembly and to further define a top opening on an opposing side from the bottom wall, at least one of the bottom wall and the plurality of side walls comprises a liquid crystal polymer, the liquid crystal polymer comprises a plurality of blocks comprising an average of about 2 to about 5 structural units derived from hydroxybenzoic acid, and the container has a water vapor transmission rate at a wall thickness of 1 mm of less than about 0.07 g/m2/day, as measured at 38° C. and a relative humidity of 100% according to ISO 15106 and ASTM F1249.
    Type: Application
    Filed: November 29, 2018
    Publication date: May 30, 2019
    Inventors: In Ki KIM, Kyeong PANG, In KIM, Feifei FANG, Joungeun YOO, Ginam KIM, In Su LEE
  • Patent number: 10141407
    Abstract: According to example embodiments, a graphene device includes a first electrode, a first insulation layer on the first electrode, an information storage layer on the first insulation layer, a second insulation layer on the information storage layer, a graphene layer on the second insulation layer, a third insulation layer on a first region of the graphene layer, a second electrode on the third insulation layer, and a third electrode on a second region of the graphene layer.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: November 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: David Seo, Ho-jung Kim, In-kyeong Yoo, Myoung-jae Lee, Seong-ho Cho
  • Publication number: 20160377954
    Abstract: An acousto-optic device capable of increasing a range of a diffraction angle of output light by using a nanostructured acousto-optic medium, and an optical scanner, an optical modulator, a two-dimensional/three-dimensional (2D/3D) conversion stereoscopic image display apparatus, and a holographic display apparatus using the acousto-optic device. The acousto-optic device may include a nanostructured acousto-optic medium formed by at least two different mediums repeatedly alternating with each other, wherein at least one of the at least two different mediums includes an acousto-optic medium. The acousto-optic device having the aforementioned structure may increase the range of a diffraction angle of output light.
    Type: Application
    Filed: September 8, 2016
    Publication date: December 29, 2016
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seung-hoon HAN, In-kyeong YOO, Sang-yoon LEE, Hong-seok LEE, Moon-gyu HAN, Sun-kook KIM
  • Patent number: 9477101
    Abstract: An acousto-optic device capable of increasing a range of a diffraction angle of output light by using a nanostructured acousto-optic medium, and an optical scanner, an optical modulator, a two-dimensional/three-dimensional (2D/3D) conversion stereoscopic image display apparatus, and a holographic display apparatus using the acousto-optic device. The acousto-optic device may include a nanostructured acousto-optic medium formed by at least two different mediums repeatedly alternating with each other, wherein at least one of the at least two different mediums includes an acousto-optic medium. The acousto-optic device having the aforementioned structure may increase the range of a diffraction angle of output light.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: October 25, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-hoon Han, In-kyeong Yoo, Sang-yoon Lee, Hong-seok Lee, Moon-gyu Han, Sun-kook Kim
  • Publication number: 20160268418
    Abstract: Provided are nonvolatile memory transistors and devices including the nonvolatile memory transistors. A nonvolatile memory transistor may include a channel element, a gate electrode corresponding to the channel element, a gate insulation layer between the channel element and the gate electrode, an ionic species moving layer between the gate insulation layer and the gate electrode, and a source and a drain separated from each other with respect to the channel element. A motion of an ionic species at the ionic species moving layer occurs according to a voltage applied to the gate electrode. A threshold voltage changes according to the motion of the ionic species. The nonvolatile memory transistor has a multi-level characteristic.
    Type: Application
    Filed: May 26, 2016
    Publication date: September 15, 2016
    Inventors: Myoung-jae Lee, Seong-ho Cho, Ho-jung Kim, Young-soo Park, David Seo, In-kyeong Yoo
  • Patent number: 9441822
    Abstract: A color optical pen includes a tip unit, a pen body unit attached to the tip unit; a pressure sensor that is disposed in the tip unit and configured to sense at least contact between a display unit of a terminal device and the tip unit; a light source that is disposed in the pen body unit and is configured to output light through the tip unit, if the pressure sensor senses the contact; a color selection switch that is disposed on the pen body, the color selection switch configured to select a color in response to operation by a user; and a driver configured to drive the light source at a frequency or pattern based on operation of the color selection switch.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: September 13, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, In-kyeong Yoo, U-in Chung, I-hun Song, Seung-eon Ahn
  • Patent number: 9379319
    Abstract: Provided are nonvolatile memory transistors and devices including the nonvolatile memory transistors. A nonvolatile memory transistor may include a channel element, a gate electrode corresponding to the channel element, a gate insulation layer between the channel element and the gate electrode, an ionic species moving layer between the gate insulation layer and the gate electrode, and a source and a drain separated from each other with respect to the channel element. A motion of an ionic species at the ionic species moving layer occurs according to a voltage applied to the gate electrode. A threshold voltage changes according to the motion of the ionic species. The nonvolatile memory transistor has a multi-level characteristic.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: June 28, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-jae Lee, Seong-ho Cho, Ho-jung Kim, Young-soo Park, David Seo, In-kyeong Yoo
  • Patent number: 9373685
    Abstract: A graphene device and an electronic apparatus including the same are provided. According to example embodiments, the graphene device includes a transistor including a source, a gate, and a drain, an active layer through which carriers move, and a graphene layer between the gate and the active layer. The graphene layer may be configured to function both as an electrode of the active layer and a channel layer of the transistor.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: June 21, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeon-jin Shin, Kyung-eun Byun, Hyun-jae Song, Seong-jun Park, David Seo, Yun-sung Woo, Dong-wook Lee, Jae-ho Lee, Hyun-jong Chung, Jin-seong Heo, In-kyeong Yoo
  • Patent number: 9312368
    Abstract: A graphene device including separated junction contacts and a method of manufacturing the same are disclosed. The graphene device is a field effect transistor (FET) in which graphene is used as a channel. A source electrode and a drain electrode do not directly contact the graphene channel, and junction contacts formed by doping semiconductor are separately disposed between the graphene channel and the source electrode and between the graphene channel and the drain electrode. Therefore, in an off state where a voltage is not applied to a gate electrode, due to a barrier between the graphene channel and the junction contacts, carriers may not move. As a result, the graphene device may have low current in the off state.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: April 12, 2016
    Assignee: Samsuung Electronics Co., LTD.
    Inventors: Jae-ho Lee, Kyung-eun Byun, Hyun-jae Song, Hyeon-jin Shin, Min-Hyun Lee, In-kyeong Yoo, Seong-jun Park
  • Patent number: 9190103
    Abstract: Provided are a storage medium, which has a security function, for storing media content and an output apparatus for outputting data stored in the storage medium. The storage medium includes a controller for converting at least one of a position of pins of a connector and a storage position of media content in a memory unit in order to control transmission of the media content in the memory unit to the output apparatus.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: November 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Jung Kim, In-Kyeong Yoo, Ho-Jung Kim, Chul-Woo Park
  • Publication number: 20150144918
    Abstract: An optical film manufacturing method includes forming a master in which a shape corresponding to a plurality of micro-lens patterns is engraved, forming a low refractive index pattern layer in which the plurality of micro-lens patterns are formed, by using the master, forming a high refractive index material layer that has a higher refractive index than a refractive index of the low refractive index pattern layer, and imprinting the low refractive index pattern layer on the high refractive index material layer to form a high refractive index pattern layer, on a first surface of a substrate.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 28, 2015
    Inventors: Eun-hyoung CHO, Woong KO, Jae-kwan KIM, Chang-youl MOON, Hong-shik SHIM, In-kyeong YOO, Chul-ho JEONG
  • Publication number: 20150137074
    Abstract: A graphene device including separated junction contacts and a method of manufacturing the same are disclosed. The graphene device is a field effect transistor (FET) in which graphene is used as a channel. A source electrode and a drain electrode do not directly contact the graphene channel, and junction contacts formed by doping semiconductor are separately disposed between the graphene channel and the source electrode and between the graphene channel and the drain electrode. Therefore, in an off state where a voltage is not applied to a gate electrode, due to a barrier between the graphene channel and the junction contacts, carriers may not move. As a result, the graphene device may have low current in the off state.
    Type: Application
    Filed: July 17, 2014
    Publication date: May 21, 2015
    Inventors: Jae-ho LEE, Kyung-eun BYUN, Hyun-jae SONG, Hyeon-jin SHIN, Min-Hyun LEE, In-kyeong YOO, Seong-jun PARK
  • Publication number: 20150123078
    Abstract: According to example embodiments, a graphene device includes a first electrode, a first insulation layer on the first electrode, an information storage layer on the first insulation layer, a second insulation layer on the information storage layer, a graphene layer on the second insulation layer, a third insulation layer on a first region of the graphene layer, a second electrode on the third insulation layer, and a third electrode on a second region of the graphene layer.
    Type: Application
    Filed: October 3, 2014
    Publication date: May 7, 2015
    Inventors: David SEO, Ho-jung KIM, In-kyeong YOO, Myoung-jae LEE, Seong-ho CHO
  • Publication number: 20150028278
    Abstract: Provided are nonvolatile memory transistors and devices including the nonvolatile memory transistors. A nonvolatile memory transistor may include a channel element, a gate electrode corresponding to the channel element, a gate insulation layer between the channel element and the gate electrode, an ionic species moving layer between the gate insulation layer and the gate electrode, and a source and a drain separated from each other with respect to the channel element. A motion of an ionic species at the ionic species moving layer occurs according to a voltage applied to the gate electrode. A threshold voltage changes according to the motion of the ionic species. The nonvolatile memory transistor has a multi-level characteristic.
    Type: Application
    Filed: July 28, 2014
    Publication date: January 29, 2015
    Inventors: Myoung-jae Lee, Seong-ho Cho, Ho-jung Kim, Young-soo Park, David Seo, In-kyeong Yoo
  • Publication number: 20140231752
    Abstract: A graphene device and an electronic apparatus including the same are provided. According to example embodiments, the graphene device includes a transistor including a source, a gate, and a drain, an active layer through which carriers move, and a graphene layer between the gate and the active layer. The graphene layer may be configured to function both as an electrode of the active layer and a channel layer of the transistor.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 21, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyeon-jin SHIN, Kyung-eun BYUN, Hyun-jae SONG, Seong-jun PARK, David SEO, Yun-sung WOO, Dong-wook LEE, Jae-ho LEE, Hyun-jong CHUNG, Jin-seong HEO, In-kyeong YOO