Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Abstract: A storage device may include a storage unit that stores data transmitted via a plurality of first wires; and a security control unit that controls connection between each of a plurality of second wires connected to an external device and each of the plurality of first wires by programming a plurality of switching devices according to an encryption key.

Abstract: Semiconductor devices including variable resistance materials and methods of operating the semiconductor devices. The semiconductor devices use variable resistance materials with resistances that vary according to applied voltages as channel layers.

Abstract: A nonvolatile memory cell may include a bidirectional switch having a first threshold voltage when a forward current is applied to the bidirectional switch and a second threshold voltage when a reverse current is applied to the bidirectional switch; and a variable resistor connected to the bidirectional switch in series. A state of resistance of the variable resistor may be controlled according to voltage applied to the variable resistor. A sum of a magnitude of the first threshold voltage and a magnitude of the second threshold voltage may be greater than a write voltage that is used to perform a write operation on the variable resistor.

Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.

Abstract: A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a middle electrode disposed on the resistor structure, a diode structure disposed on the middle electrode, and an upper electrode disposed on the diode structure. A nonvolatile memory device wherein the resistor structure includes one resistor and the diode structure includes one diode. An array of nonvolatile memory device as described above. Methods of manufacturing a nonvolatile memory device and an array of nonvolatile memory device.

Abstract: A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.

Abstract: A nonvolatile memory device having self-presence diode characteristics, and/or a nonvolatile memory array including the nonvolatile memory device may be provided. The nonvolatile memory device may include a lower electrode, a first semiconductor oxide layer on the lower electrode, a second semiconductor oxide layer on the first semiconductor oxide layer, and/or an upper electrode on the second semiconductor oxide layer.

Abstract: The non-volatile memory device may include a substrate, a plurality of first signal lines on the substrate in a vertical direction, a plurality of memory cells having ends connected to the plurality of first signal lines, a plurality of second signal lines perpendicular to the plurality of first signal lines on the substrate and each connected to other ends of the plurality of memory cells, and a plurality of selection elements on the substrate and connected to at least two of the plurality of first signal lines.

Abstract: A resistive memory device includes a vertical transistor and a variable resistance layer. The vertical transistor includes a gate electrode on a surface of a substrate, a gate insulation layer extending along a sidewall of the gate electrode, and a single crystalline silicon layer on the surface of the substrate adjacent to the gate insulation layer. At least a portion of the single crystalline silicon layer defines a channel region that extends in a direction substantially perpendicular to the surface of the substrate. The variable resistance layer is provided on the single crystalline silicon layer. The variable resistance layer is electrically insulated from the gate electrode. Related devices and fabrication methods are also discussed.

Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

Abstract: An apparatus for displaying a three-dimensional (3D) image may include a plurality of display panels and a controller configured to apply image signals to each of the plurality of display panels. At least one of the display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction. A method of displaying a three-dimensional (3D) image may include displaying plane images on each of a plurality of display panels. At least one of the plurality of display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction.

Abstract: A storage node having a metal-insulator-metal structure, a non-volatile memory device including a storage node having a metal-insulator-metal (MIM) structure and a method of operating the same are provided. The memory device may include a switching element and a storage node connected to the switching element. The storage node may include a first metal layer, a first insulating layer and a second metal layer, sequentially stacked, and a nano-structure layer. The storage node may further include a second insulating layer and a third metal layer. The nano-structure layer, which is used as a carbon nano-structure layer, may include at least one fullerene layer.

Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Abstract: Example embodiments may provide data storage devices using movement of a magnetic domain wall and/or a method of operating magnetic domain data storage devices. The data storage device may include a first magnetic layer for writing data having two magnetic domains magnetized in different directions, a second magnetic layer for storing data at a side of the first magnetic layer, a data recording device connected to the first magnetic layer and the second magnetic layer, and a plurality of reading heads configured to read the second magnetic layer. The data storage device may store a larger amount of data without requiring moving mechanical systems.

Abstract: A nonvolatile memory device including one resistor and one transistor. The resistor may correspond to a resistance layer electrically connected to a first impurity region and a second impurity region of the transistor.

Abstract: Resistive memory devices having at least one varistor and methods of operating the same are disclosed. The resistive memory device may include at least one bottom electrode line, at least one top electrode line crossing the at least one bottom electrode line, and at least one stack structure disposed at an intersection of the at least one top electrode line and the at least one bottom electrode line including a varistor and a data storage layer.

Abstract: A transistor in which a physical property of its channel is changed according to an applied voltage, and methods of manufacturing and operating the same are provided. The transistor may include a first conductive layer on a substrate, a phase change layer and a second conductive layer which are sequentially stacked on the first conductive layer, a first current direction limiting unit and a second current direction limiting unit formed on the second conductive layer by being separated within a space, a third conductive layer and a fourth conductive layer formed on the first current direction limiting unit and the second current direction limiting unit, respectively, a word line connected to the third conductive layer, a bit line connected to the fourth conductive layer, and a voltage lowering unit connected to the word line.

Abstract: An electric field head includes a body portion and a read head having a channel layer provided on an air bearing surface (ABS) of the body portion facing a recording medium and a source and a drain contacting both ends of the channel layer. The electric field head is manufactured by defining a head forming portion of a substrate, separating the head forming portion from the substrate, forming an ABS pattern on a side surface of the separated head forming portion, and forming a channel layer for a read head on a surface of the head forming portion where the ABS pattern is formed. An information storage device includes a ferroelectric recording medium and the electric field head.