Patents by Inventor In Kyu You

In Kyu You has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8362467
    Abstract: A composition for an organic dielectric, includes a compound represented by Formula 1 below; and a cross-linking agent, wherein, in Formula 1, R1 is any one of hydrogen, hydroxyl group, ester group, amide group, or alkyl group or alkoxy group of a carbon number of 1 to 12, R2 is selected from electrolytic functional groups, each of a and b is a positive integer, and the ratio of b to a (b/a) is larger than 0 and smaller than 99,
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: January 29, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Young Noh, In-Kyu You, Jae Bon Koo, Soon Won Jung
  • Publication number: 20130005079
    Abstract: Provided is an organic thin film transistor, method of forming the same, and a memory device employing the same. The organic thin film transistor includes a substrate, a source electrode and a drain electrode on the substrate, an active layer on the substrate between the source electrode and the drain electrode, a gate electrode controlling the active layer, and an organic dielectric layer between the active layer and the gate electrode. The organic dielectric layer includes nanoparticles, a hydrophilic polymer surrounding the nanoparticles, and a hydrophobic polymer.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong-Young NOH, In-Kyu You, Jae Bon Koo
  • Patent number: 8344366
    Abstract: Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: January 1, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kang Dae Kim, In-Kyu You, Jae Bon Koo, Yong Suk Yang, Seung Youl Kang
  • Patent number: 8278138
    Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: October 2, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Suk Yang, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
  • Publication number: 20120235961
    Abstract: A flexible flat cable capable of minimizing distortion and interference of a signal and a manufacturing method thereof are provided. The cable includes wire cores, insulation coating layers surrounding the wire cores, shield coating layers surrounding the insulation coating layers, an upper insulation plate layer formed on the shield coating layers, a lower insulation plate layer formed under the shield coating layers and opposite to the upper insulation plate layer, and a shield plate layer formed under the lower insulation plate layer.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 20, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu YOU, Jae Bon KOO, Su Jae LEE, Taeyoub KIM, Soon-Won JUNG, Kang-Jun BAEG
  • Publication number: 20120161234
    Abstract: A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.
    Type: Application
    Filed: January 13, 2012
    Publication date: June 28, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, In-Kyu YOU, Seongdeok AHN, Kyoung Ik CHO
  • Patent number: 8198148
    Abstract: Provided is a method for manufacturing a semiconductor device. The method includes: providing a first substrate where an active layer is formed on a buried insulation layer; forming a gate insulation layer on the active layer; forming a gate electrode on the gate insulation layer; forming a source/drain region on the active layer at both sides of the gate electrode; exposing the buried insulation layer around a thin film transistor (TFT) including the gate electrode and the source/drain region; forming an under cut at the bottom of the TFT by partially removing the buried insulation layer; and transferring the TFT on a second substrate.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: June 12, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Seung Youl Kang, In-Kyu You
  • Publication number: 20120139558
    Abstract: Provided is a radio frequency identification (RFID) tag. The RFID tags includes: a conductive layer and a conductive line disposed above and below an insulation layer, respectively; an antenna connected to one end of the conductive line; a resistor connected to the other end of the conductive line; a first conductive plate connected to the conductive line and constituting a first capacitor in conjunction with the conductive layer and the insulation layer; and a first sensing device connected between the conductive line and the conductive layer and having an impedance changed according to a sensing of a first target material.
    Type: Application
    Filed: November 30, 2011
    Publication date: June 7, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu You, Jae Bon Koo
  • Publication number: 20120141665
    Abstract: Provided are methods of and apparatuses for forming a metal pattern. In the method, an initiator and a metal pattern are sequentially combined on a previously-formed bonding agent pattern improving adhesion and/or junction properties between the substrate and the metal. The bonding agent pattern may be formed using a reverse offset printing method. The metal pattern may be formed using an electroless electrochemical plating method. The metal pattern can be formed with improved uniformity in thickness and planar area.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 7, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Tae-Youb KIM, Kang-Jun Baeg, In-Kyu You, Minseok Kim, Jae Bon Koo
  • Publication number: 20120125214
    Abstract: Provided is an offset printer configured to increase or maximize productivity and yield. The offset printer includes a printing roller, a coating unit configured to apply a printing substance to the printing roller, a patterning unit configured to pattern the printing substance applied to the printing roller from the coating unit, a printing unit configured to transfer the patterned printing substance to a printing medium, and a cleaning unit configured to clean the printing substance remaining on the printing roller by a dry cleaning method.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 24, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon Koo, In-Kyu You, Minseok Kim, Taeyoub Kim
  • Publication number: 20120125213
    Abstract: Provided is a cliche and a method of manufacturing the cliche which can increase or maximize productivity and production yield. The manufacturing method of the cliche includes providing a substrate, forming organic patterns protruding on the substrate, and forming an ink absorption layer on the organic patterns or on the substrate exposed from the organic patterns.
    Type: Application
    Filed: July 29, 2011
    Publication date: May 24, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, Minseok Kim, Taeyoub Kim, In-Kyu You
  • Patent number: 8119463
    Abstract: Provided is a method of manufacturing a thin film transistor that can improve self-alignment. In this method, a semiconductor layer comprising a first doped region, a second doped region and a channel region is formed on a sacrificial layer on a first substrate. Next, the semiconductor layer is separated from the first substrate and is then coupled on a second substrate. Next, a dielectric layer is formed on the second substrate and the semiconductor layer, and a first photoresist layer is formed on the dielectric layer. Thereafter, the first photoresist layer is exposed to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask, to form a first mask pattern.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: February 21, 2012
    Assignee: Electronics And Telecommunications Research Institute
    Inventors: Jae Bon Koo, In-Kyu You, Seongdeok Ahn, Kyoung Ik Cho
  • Publication number: 20120001159
    Abstract: Provided is an insulating layer in which an inorganic material is added to an organic polymer to thereby improve the insulating properties, an organic thin film transistor using the insulating layer, and a method of fabricating the organic thin film transistor. An insulating layer for an organic thin film transistor including a vinyl polymer and an inorganic material is provided. Here, a weight ratio of the vinyl polymer to the inorganic material may be in the range of 1:0.0001 to 1:0.5. Accordingly, it is possible to fabricate a thin film at low temperature and, further, to fabricate an insulating layer having a high-dielectric constant, not affecting other layers formed in the previous processes during the formation of the insulating layer.
    Type: Application
    Filed: September 15, 2011
    Publication date: January 5, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gi Heon KIM, Sung Min YOON, Kyu Ha BAEK, In Kyu YOU, Seung Youl KANG, Seong Deok AHN, Kyung Soo SUH
  • Publication number: 20110272661
    Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.
    Type: Application
    Filed: October 29, 2010
    Publication date: November 10, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
  • Patent number: 8049953
    Abstract: Provided is a microcapsule patterning method for patterning electrophoretic microcapsules on a substrate, the method including the steps of: preparing a microcapsule slurry in which microcapsules and a water-soluble binder are mixed; putting the microcapsule slurry into a liquid ejector having injection and ejection ports formed therein; and applying the microcapsule slurry contained in the liquid ejector onto the substrate so as to pattern pixels using the microcapsules. Accordingly, specific patterns are formed without physical and chemical damage to the microcapsules. Therefore, the patterns can be used as pixels of flat panel displays. Further, through the patterning, it is possible to implement a color display device which does not exhibit performance degradation.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: November 1, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chul Am Kim, Seung Youl Kang, Hey Jin Myoung, Kyung Soo Suh, Seong Deok Ahn, Gi Heon Kim, In Kyu You, Ji Young Oh
  • Patent number: 8047849
    Abstract: Provided are a braille display device using an electrorheological fluid and a method for manufacturing the same. The braille display device includes: a base body in which a plurality of insulating reception grooves are formed; a first electrode arranged below the base body; an electrorheological fluid received in the reception groove; a microcapsule having an electrophoresis particle which is dispersed in the electrorheological fluid; a second electrode arranged above the microcapsule; a braille pin installed above the second electrode; and a braille pin protection film arranged above the braille pin.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: November 1, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Deok Ahn, Seung Youl Kang, Chul Am Kim, Ji Young Oh, In Kyu You, Gi Heon Kim, Kyu Ha Baek, Kyung Soo Suh
  • Patent number: 8039294
    Abstract: Provided is an insulating layer in which an inorganic material is added to an organic polymer to thereby improve the insulating properties, an organic thin film transistor using the insulating layer, and a method of fabricating the organic thin film transistor. An insulating layer for an organic thin film transistor including a vinyl polymer and an inorganic material is provided. Here, a weight ratio of the vinyl polymer to the inorganic material may be in the range of 1:0.0001 to 1:0.5. Accordingly, it is possible to fabricate a thin film at low temperature and, further, to fabricate an insulating layer having a high-dielectric constant, not affecting other layers formed in the previous processes during the formation of the insulating layer.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: October 18, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gi Heon Kim, Sung Min Yoon, Kyu Ha Baek, In Kyu You, Seung Youl Kang, Seong Deok Ahn, Kyung Soo Suh
  • Publication number: 20110204334
    Abstract: Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.
    Type: Application
    Filed: August 18, 2010
    Publication date: August 25, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kang Dae KIM, In-Kyu You, Jae Bon Koo, Yong Suk Yang, Seung Youl Kang
  • Patent number: 7960724
    Abstract: Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: June 14, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Young Noh, Jae Bon Koo, In-Kyu You, Kang-Jun Baeg, Dong-Yu Kim
  • Publication number: 20110136296
    Abstract: Provided is a method for manufacturing a semiconductor device. The method includes: providing a first substrate where an active layer is formed on a buried insulation layer; forming a gate insulation layer on the active layer; forming a gate electrode on the gate insulation layer; forming a source/drain region on the active layer at both sides of the gate electrode; exposing the buried insulation layer around a thin film transistor (TFT) including the gate electrode and the source/drain region; forming an under cut at the bottom of the TFT by partially removing the buried insulation layer; and transferring the TFT on a second substrate.
    Type: Application
    Filed: April 26, 2010
    Publication date: June 9, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon Koo, Seung Youl Kang, In-Kyu You